Micro/370: a 32-bit single-chip microprocessor

Hua, Changzhou; Ong, S.; Tsai, M. Y.; Shih, F.W.; Hou, Jigong; Lewis, K.; Tang, Jinyao; Trempel, C. A.; Hadsell, R.W.; Yu, Hwa; Greier, P. F.; Franch, R.; McCormick, P.; Davis, C.; Diamond, A.L.; Medve, T.J.

doi:10.1109/jssc.1986.1052602

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1988

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Cited by 9 publications

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“…The IlROM scheme has two primary benefits when compared with the numerous emulation schemes that have been reported in the literature[8] [9]. First, it provides much higher performance when the amount of ROM space is limited relative to the number of instructions that must be implemented.…”

Section: Cpu Architecturementioning

confidence: 99%

A highly integrated, fault-tolerant minicomputer: the NonStop CLX

Lenoski

1988

Digest of Papers. COMPCON Spring 88 Thirty-Third IEEE Computer Society International Conference

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The NonStop CLX, a highly integrated version of Tandem Computers' fault-tolerant NonStop architecture, is described. An overview of the system block diagram and a detailed description of the CLX processor is given. The processor is based on a custom CMOS chip-set developed using silicon compilation techniques. The CPU micro architecture is a hybrid of traditional minicomputer and high performance microprocessor architectures. This merging leads to a number of novel structures including a single static RAM array that is used as writeable control store, data cache and page table cache. The processor includes a high degree of fault checking in order to assure data integrity and fault-tolerant operation.

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Section: Cpu Architecturementioning

confidence: 99%