Microarchitecture-level power management

Iyer, A.; Marculescu, Diana

doi:10.1109/tvlsi.2002.1043326

Cited by 16 publications

(17 citation statements)

References 24 publications

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“…The power switch enables a single core to be turned on or off individually. This independently configurable feature is very desirable for a variety of applications that may have different power consumption requirements, as power dissipation limits have emerged as a major constraint in the design and application of microprocessors [Brooks et al 2000;Kam et al 2000;Iyer et al 2002;Karnik et al 2002].…”

Section: Multiple Ground Domains Implementationmentioning

confidence: 99%

LVS verification across multiple power domains for a quad-core microprocessor

Blakely

Sooy

et al. 2006

ACM Trans. Des. Autom. Electron. Syst.

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A unique LVS (layout-versus-schematic) methodology has been developed for the verification of a four-core microprocessor with multiple power domains using a triple-well 90-nm CMOS technology. The chip is migrated from its previous generation that is for a twin-well process. Due to the design reuse, VDD and GND are designed as global nets but they are not globally connected across the entire chip. The standard LVS flow is unable to handle the additional design complexity and there seems to be no published literature tackling the problem. This paper presents a two-phase LVS methodology: a standard LVS phase where power and ground nets are defined as global nets and a multi-power-domain LVS phase where power and ground nets are treated as local nets. The first phase involves verifying LVS at the block level as well as the full-chip level. The second phase aims at verifying the integrity of the multi-power-domain power grid that is not covered in the first phase LVS. The proposed LVS methodology was successfully verified by real silicon.

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Section: Multiple Ground Domains Implementationmentioning

confidence: 99%

LVS verification across multiple power domains for a quad-core microprocessor

Blakely

Sooy

et al. 2006

ACM Trans. Des. Autom. Electron. Syst.

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“…A hardware-based adaptive architecture is presented in [21] for wide-issue superscalar processors. An FSM is used to detect the hotshots in the running application and automatically commands changes in fetch rate, RUU [22] and LSQ sizes.…”

Section: Prior Workmentioning

confidence: 99%

An energy-efficient adaptive multiple-issue architecture

Lan¹,

Biglari-Abhari²

2004

Euromicro Symposium on Digital System Design, 2004. DSD 2004.

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Energy-efficient and low-power designs issues are becoming more important in modern processors. In this paper we propose an energy-efficient adaptive multiple-issue architecture for portable systems. The architecture utilizes a hardware-software cooperation approach to minimize hardware overhead while providing control flexibilities to programs and operating systems. Optimizations are made based on the program execution profile. Simulation results show that the adaptive architecture improves the performance by an average 20% with a maximum 8% reduction in energy consumption compared with the baseline model. The increase in power dissipation is restricted to less than 6%.

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“…For example, dynamic load balancing tools [10] that perform periodic load balancing actions need accurate and timely knowledge of imbalance among processes to avoid unnecessary load balancing actions. Similarly, power management tools [15] require information about CPU utilization to make decisions on scaling up or down processor speed to boost application performance or save power.…”

Section: Introductionmentioning

confidence: 99%

Embedded Gossip: Lightweight Online Measurement for Large-Scale Applications

Zhu¹,

Bridges²,

Maccabe³

2007

27th International Conference on Distributed Computing Systems (ICDCS '07)

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For large-scale parallel applications, lightweight online monitoring can enable a wide range of online adaptations, including load balancing, power management, and progress monitoring. The processing and monitoring overhead of centralized global tracing techniques make them unsuitable for such tasks. Purely local tools, on the other hand, fail to provide the global information necessary for many desirable online adaptations of large-scale applications.In this paper, we describe a novel distributed online measurement method for large-scale applications called Embedded Gossip (EG). EG works by piggybacking performance information about application behavior on existing application messages and merging received information with previously known data in a fashion customized to the needs of a particular monitoring task. EG thus provides each process with both local and global views of application behavior with low overhead.To illustrate the capabilities of Embedded Gossip, we also show that it disseminates global information in a timely fashion for a wide range of monitoring tasks, including critical path profiling, workload imbalance monitoring, and progress monitoring. This global information has a wide range of potential uses, including imbalance detection for load balancing and energy management tools, progress monitoring for batch schedulers, and a wide range of other performance debugging and optimization techniques.

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Microarchitecture-level power management

Cited by 16 publications

References 24 publications

LVS verification across multiple power domains for a quad-core microprocessor

LVS verification across multiple power domains for a quad-core microprocessor

An energy-efficient adaptive multiple-issue architecture

Embedded Gossip: Lightweight Online Measurement for Large-Scale Applications

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