Microchip Health Monitoring System Using the FLL Circuit

Abstract

Here a solution for a Microchip Health Monitoring (MHM) system using MTOL (Multi-Temperature Operational Life) reliability testing assessment data is proposed. The module monitors frequency degradation over time compared to lab tested data. Since trends in performance degradation in recently developed devices have transitioned from multiple failure mechanisms to a single dominant failure mechanism, development of the monitor is greatly simplified. The monitor uses a novel circuit customized to deliver optimum accuracy by combining the concepts of ring oscillator (RO) and phase locked loop (PLL) circuits. The modified circuit proposed is a new form of the frequency locked loop (FLL) circuit. We demonstrate that the collection of frequency degradation data from the ring circuits of each test produces Weibull distributions with steep slopes. This implies that the monitor can predict accurate end-of-life (EOL) predictions at early stages of chip degradations. The design of the microchip health monitoring system projected in this work can have great benefit in all systems using FPGA and ASIC devices.

Mitigation of Thermal Stability Concerns in FinFET Devices

“…It was apparent that more efforts would be necessary to bring the SNR to an acceptable level. In previous studies, Weibull distributions were used to show that the amount of dispersion of the TTF values directly corresponds to the number of stages in the ring circuits [7]. When the TTF values are set to a ring frequency plot, the data in low frequencies conserve a tight pattern and fan out in the higher frequency rings.…”

“…Comparable results are received for different stress modes and technologies. Additional explanation is provided in [7].…”

“…The data extracted from MTOL tests based on this model were used as a control set for comparison to TTF measurements of the devices in real time. We implemented a microchip health monitoring system into Ultra96 MPSoC development boards, based on the design plan detailed in [7], in C language. The FPGA of the system included 140 ring oscillators, all with three stages, developed using VHDL.…”

“…In this study, we perform a novel procedure for optimizing accuracy in sensing decreases in performance for the continuous self-monitoring of microchips. The study advances efforts detailed in a previous study, where a microchip health monitor (MHM) system for supplying real-time time-to-failure (TTF) assessments of devices was proposed [7]. The monitor was developed based on the assumption that the MTTF of known failure mechanisms can be modeled using a statistical approximation as described in [8].…”