Millimeterwave characteristics of flip-chip interconnects for multi-chip modules

Heinrich, W.; Jentzsch, Andreas Vargas; Baumann, G.

doi:10.1109/mwsym.1998.705181

Cited by 54 publications

(9 citation statements)

References 8 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…In deciding on the column dimensions, we were guided by earlier work in the area of flip chip packaging for microwave devices [1], [2], [17]. The optimal bump height and diameter for any given application should always be finalized by accurate RF modeling.…”

Section: Fabrication Of Test Boards With Fine-pitch Copper Columnmentioning

confidence: 99%

“…Flip chip-on-board (FCOB) is particularly attractive in these high-frequency applications because the short electrical path between substrate and chip allows for very low parasitic inductance, while the almost coplanar geometry minimizes the physical discontinuities in the signal paths. With careful design of the transmission line and bump geometries, excellent reflection characteristics can be achieved, with low return losses at frequencies up to 100 GHz [1], [2]. Because of these advantages, flip-chip is emerging as a favorite packaging technique for microwave integrated circuits (MICs).…”

mentioning

confidence: 99%

See 1 more Smart Citation

Thermosonic Flip Chip Interconnection Using Electroplated Copper Column Arrays

Gao

Holmes

2006

IEEE Trans. Adv. Packag.

View full text Add to dashboard Cite

Abstract-A novel flip chip process is reported in which bare dies are thermosonically bonded to arrays of electroplated copper columns formed on a substrate. The new process is intended as a low-cost, lead-free chip-on-board (COB) interconnection method for high-frequency devices. A detailed study has been performed of the electroplating and thermosonic bonding techniques involved. It was found that oxygen plasma treatment of the resist mask could increase the yield of the fine-pitch ( 150 m) column electroplating process, while the flatness of the resulting columns was affected by the plating current density and the sidewall profiles in the resist mold. Under optimal conditions, column arrays with flat tops could be produced with a 100% yield, and with a column height deviation of less than 0.5 m over an area of 10 mm 10 mm. The array thermosonic bonding process was studied with the aid of Box-Behnken design of experiments based on response surface methodology. A second-order relationship between the input bonding variables and the bonding strength was derived and used to determine optimal process conditions. With this optimized process, silicon chips with aluminium metallization were thermosonically flip chip bonded to quartz test boards bumped with gold-capped copper columns. Sixteen prototype assemblies without underfill protection were evaluated by accelerated lifetime tests. The contact resistances of single column connections showed no significant change after 50 thermal shocks of 0 C to 100 C, and samples subjected to high-temperature storage remained intact at all bonding interfaces after 1.5 h at 300 C. Thermal cycling between 55 C and 125 C produced open-circuit defects in a small number of connections after 70 cycles.Index Terms-Chip-on-board, copper column, design of experiments, electroplating, flip chip, lead-free, oxygen plasma treatment, response surface methodology, thermosonic (TS) bonding.

show abstract

Section: Fabrication Of Test Boards With Fine-pitch Copper Columnmentioning

confidence: 99%

mentioning

confidence: 99%

Thermosonic Flip Chip Interconnection Using Electroplated Copper Column Arrays

Gao

Holmes

2006

IEEE Trans. Adv. Packag.

View full text Add to dashboard Cite

show abstract

“…To compensate the capacitive effect of the traditional flip-chip transition, a high impedance transmission line, which exhibits an inductive effect, is adopted [7]- [9]. The top view of the hi-impedance compensation as shown on the left side of Fig.…”

Section: A Hi-impedance Compensationmentioning

confidence: 99%

Modeling and design for electrical performance of wideband flip-chip transition

Wang¹,

Wu²

2003

IEEE Trans. Adv. Packag.

View full text Add to dashboard Cite

A locally matching technique is proposed in this paper to improve the wideband performance of the flip-chip transition. The gap width of the coplanar waveguide (CPW) line in the bump pad region of both the chip and board is enlarged for achieving larger inductance to compensate the capacitance at the transition, making the approximate impedance close to 50 .An equivalent circuit is derived from the frequency response of the transition simulated by Sonnet and is used to control the zero frequency of the structure. With a properly chosen value of the enlarged width, the zero frequency can be controlled to achieve an optimal transition performance over an as wide as possible bandwidth. A systematic design procedure is established and employed to design a transition over a band from dc to 60 GHz. The design and simulation results are also compared with the measured data of a scaled structure as well as a realization of an optimized flip-chip transition design ranging from dc to Ka band. The measured data show a good agreement with the simulation results, if under a careful calibration procedure. Both demonstrate that the present transition design can achieve better than 25 dB in return loss and 0.2 dB in insertion loss over dc to 35 GHz.

show abstract

“…The standard MCMs techniques [2], [3], [4], [5] were adapted for the specific application. The general aim was to develop a new techinology in order to obtain a PIN photo detectors micromatrix for optical cable coupling in higih speed communications.…”

Section: Discussionmentioning

confidence: 99%