Modeling of a silicon-carbide MOSFET with focus on internal stray capacitances and inductances, and its verification

Mukunoki, Yasushige; Horiguchi, T.; Nakayama, Yasushi; Nishizawa, Akinori; Nakamura, Yukihiko; Konno, Kentaro; Kuzumoto, Masaki; Akagi, Hirofumi

doi:10.1109/apec.2017.7931076

Cited by 21 publications

(15 citation statements)

References 14 publications

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“…The bias tees used to measure S-parameters of on-state SiC MOSFETs in [9] were designed to a maximum current of 2 A, which limited the parameter extraction up to V gs ≈ 6 V. When using the Sparameter measurements, the influence of parasitics at higher frequencies has to be considered either by de-embedding the S-parameters of the package from the measurement results [9] or by performing the measurements at frequencies below 1 MHz [20]. Another approach of extracting the nonlinear voltage dependence of power MOSFET's C gs and C gd is by means of the dynamic I-V waveforms [5], [10], [17], [21]. In comparison to Si-IGBTs, the gate-source voltage V gs of Sisuper junction (SJ) and SiC power MOSFETs is non-constant during the so-called Miller phase of the switching transients, i.e the phase characterized by the change of the drain-source voltage V ds [10], [22].…”

Section: Mosfet Capacitances Characterization: State-of-the-artmentioning

confidence: 99%

“…In comparison to Si-IGBTs, the gate-source voltage V gs of Sisuper junction (SJ) and SiC power MOSFETs is non-constant during the so-called Miller phase of the switching transients, i.e the phase characterized by the change of the drain-source voltage V ds [10], [22]. The non-constant V gs,Miller , neglected in certain compact models [5], makes the extraction of nonlinear C gd based on the switching transients more challenging, as described in [23]. In [10], dynamic C-V characteristics of SJ Si-MOSFETs are calculated from the gate-charge curves measured by a double-pulse test (DPT) setup, assuming constant C gs .…”

Section: Mosfet Capacitances Characterization: State-of-the-artmentioning

confidence: 99%

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Accuracy of Three Interterminal Capacitance Models for SiC Power MOSFETs Under Fast Switching

Stark

Tsibizov

Nain

et al. 2021

IEEE Trans. Power Electron.

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This paper presents a comprehensive analysis of non-linear voltage-dependent capacitances of vertical SiC power MOSFETs with lateral channel, focusing specifically on fast switching transients. The capacitance-voltage (C-V) device characteristics, (Cgs, C gd , C ds), being dependent on both Vgs and V ds , are extracted by means of two-dimensional Technology Computer Aided Design (TCAD) simulations for a commercially available device in both off-and on-state modes. Different compact models for the power MOSFET are investigated, each employing a three inter-terminal capacitance model as typically used in power electronics. The performed analysis provides a detailed explanation for the importance of taking into account the dependence of C gd , Cgs and C ds on both of the voltages Vgs and V ds. This is especially important for fast switching transients (in the range of 10 ns) in order to accurately predict switching losses, driver losses, current and voltage slopes, as well as current and voltage delays. As direct measurements for C gd , Cgs and C ds in dependence of both Vgs and V ds are highly demanding, the results presented in this paper increase the understanding of both the underlying effects as well as of the trade-offs between accuracy and computational complexity made by simplifying device models. In turn, this information is highly beneficial for enabling accurate and computationally efficient automated design procedures for power electronics.

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Section: Mosfet Capacitances Characterization: State-of-the-artmentioning

confidence: 99%

Section: Mosfet Capacitances Characterization: State-of-the-artmentioning

confidence: 99%

Accuracy of Three Interterminal Capacitance Models for SiC Power MOSFETs Under Fast Switching

Stark

Tsibizov

Nain

et al. 2021

IEEE Trans. Power Electron.

View full text Add to dashboard Cite

show abstract

“…Additionally, the model of CGD is expanded by capturing its dependence on VGS via gate-charge measurements under different bias conditions. Mukunoki et al further expand upon this model in [18] by adding the VGS dependence of CGS. He et al present a detailed model defined in terms of process and layout parameters [28].…”

Section: A Recent Physics Modelsmentioning

confidence: 99%

“…Significant developments have also occurred within the category of behavioral models in the last several years. For example, Mukunoki et al replace the physics-based conduction model of [17], [18] with a behavioral description in order to improve the run-time performance and remove proprietary geometric data from the modeling process in [21]. Additionally, this paper extends the static characterization of the model to include VDS from 200 to 800 V via load-short-circuit waveforms.…”

Section: Recent Behavioral Modelsmentioning

confidence: 99%

Computational Efficiency Analysis of SiC MOSFET Models in SPICE: Static Behavior

Nelson

Lemmon

Jimenez

et al. 2020

IEEE Open J. Power Electron.

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Transient simulation of complex converter topologies is a challenging problem, especially in detailed analysis tools like SPICE. Much of the recent literature on SPICE transistor modeling ignores the requirements of application designers and instead emphasizes detail, physical accuracy, and complexity. While these advancements greatly improve model accuracy, they also serve to increase computational complexity, making the resulting models less attractive to application designers. While some authors depart from this trend and present models which emphasize simulation speed, their results and analysis are limited to qualitative observation. This research develops a methodology to quantify the computational cost of model features and competitively benchmark models against each other. Additionally, it reviews recently published SiC MOSFET models and presents a trade study on several candidate models likely to fare well in complex application simulations. Finally, this study also identifies key considerations which should be carried forward into future model design.

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“…Due to large dv/dt slew rate, the parasitic capacitance in the SiC MOSFET brings crosstalk and false turn-on issues, which have been discussed in previous studies [11][12][13][14]. On the other hand, the issues of gate voltage spikes and oscillations from the stray parameters remains under consideration [15,16]. Owing to the bonding wires and interconnections in the package, the parasitic inductance can lead to undesirable voltage spikes across the device during turn-off as documented in [17,18].…”

Section: Introductionmentioning

confidence: 95%

An Investigation of Gate Voltage Oscillation and its Suppression for SiC MOSFET

et al. 2020

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Modeling of a silicon-carbide MOSFET with focus on internal stray capacitances and inductances, and its verification

Cited by 21 publications

References 14 publications

Accuracy of Three Interterminal Capacitance Models for SiC Power MOSFETs Under Fast Switching

Accuracy of Three Interterminal Capacitance Models for SiC Power MOSFETs Under Fast Switching

Computational Efficiency Analysis of SiC MOSFET Models in SPICE: Static Behavior

An Investigation of Gate Voltage Oscillation and its Suppression for SiC MOSFET

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