Modelling of metal degradation in power devices under active cycling conditions

Abstract

Metal degradation has recently received increased attention as a failure mechanism in power devices under active cycling conditions, i.e. under repeated pulsed voltage/current loads [1, 2]. Both electro-thermal and thermo-mechanical simulation are indispensable for understanding this mechanisms. The paper presents experimental and simulation data for a dedicated test structure. A suitable lifetime model has to go beyond a simple Coffin-Manson type model to capture the essential influencing parameters

Fatigue crack growth modeling in the metallization of power semiconductors under cyclic thermo-mechanical loading

“…A temperature dependent elastic-plastic J2 constitutive model with kinematic hardening is employed to model the Copper power metallization. The plastic properties listed in Table 3 are taken from [7], [13]. Perfect adhesion of the interface between the Cu metallization and the Si substrate is assumed.…”

Study of fatigue failure in Al-chip-metallization during power cycling

“…According to the thickness of our metallization a model with temperature dependent properties was chosen. This model was inspired by [9] and uses a bilinear kinematic hardening to describe the elasto-plastic behavior of the metallization ( Figure 6). A literature study was also done for the properties of the intermetallics.…”

“…Another mechanism has been shown to induce Al extrusion: the ratcheting [8,9,10]. This ratcheting mechanism occurs because of the CTE mismatch between the Si (2 ppm/K) and the molding compound (~11 ppm/K).…”

FEM Study of Fatigue Crack Growth in a Power Semiconductor Chip Subjected to Transient Thermal Loading

“…For the Cu material, a bilinear kinematic hardening model was used. The procedure for extracting the temperature dependent material data from the wafer curvature experiments is reported in (Lederer et al, 2010) and the material data for Cu can be found in (Kanert et al, 2011).…”