2007 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA) 2007
DOI: 10.1109/vtsa.2007.378923
|View full text |Cite
|
Sign up to set email alerts
|

Monolithic 3D Integrated Circuits

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
3
2

Citation Types

0
30
0

Year Published

2008
2008
2016
2016

Publication Types

Select...
5
2
2

Relationship

0
9

Authors

Journals

citations
Cited by 83 publications
(30 citation statements)
references
References 7 publications
0
30
0
Order By: Relevance
“…8 In its current incarnation, 3-D-IC architectures are divided into two distinct types: (1) 3-D-ICs created by stacking planar 2-D chips, 9 achieving interconnection in the vertical direction using through silicon vias (TSV); and (2) monolithic 3-D-ICs where epitaxial regrowth is performed on the wafer after fabrication of the first layer of devices, yielding a second layer of single crystal silicon for a second layer of silicon devices. 10 Both of these approaches yield ICs with current flow vertical to the wafer surface, and, in that sense are 3-dimensional, however, the transistors forming each integrated circuit all have their active regions oriented parallel to the wafer surface.…”
Section: Introductionmentioning
confidence: 99%
“…8 In its current incarnation, 3-D-IC architectures are divided into two distinct types: (1) 3-D-ICs created by stacking planar 2-D chips, 9 achieving interconnection in the vertical direction using through silicon vias (TSV); and (2) monolithic 3-D-ICs where epitaxial regrowth is performed on the wafer after fabrication of the first layer of devices, yielding a second layer of single crystal silicon for a second layer of silicon devices. 10 Both of these approaches yield ICs with current flow vertical to the wafer surface, and, in that sense are 3-dimensional, however, the transistors forming each integrated circuit all have their active regions oriented parallel to the wafer surface.…”
Section: Introductionmentioning
confidence: 99%
“…[56][57][58][59] There is only one substrate, and all other layers are fabricated based on the substrate. After the devices on the substrate are fabricated, a second layer of silicon or other semiconductor film is grown on top of the first layer of devices by deposition or a thin layer may be attached using a method similar to that used in the silicon-on-insulator (SOI) process.…”
Section: D Ic Technology Introductionmentioning
confidence: 99%
“…We start with monolithic 3D integration, which enables accurate stacking of multiple active layers on a single wafer, each with a thickness of only few hundreds of nanometer [3]. In the resulting design, inter-layer vias are similar in size to typical inter-metal vias, giving this technology a very high density vertical interconnects.…”
Section: Introductionmentioning
confidence: 99%