MOS transistor modeling for RF IC design

Abstract

The design of radio-frequency (RF) integrated circuits (ICs) in deep-submicron CMOS processes requires accurate and scalable compact models of the MOS transistor that are valid in the GHz frequency range and beyond. Unfortunately, the currently available compact models give inaccurate results if they are not modified adequately. This paper presents the basis of the modeling of the MOS transistor for circuit simulation at RF. A physical and scalable equivalent circuit that can easily be implemented as a Spice subcircuit is described. The small-signal and noise models are discussed and measurements made on a 0.25µm CMOS process are presented that validate the RF MOST model up to 10GHz.

Channels That Heat Up

“…Nevertheless they show that when neither condition of Theorem 3 is satisfied, then one can construct simple examples yielding a bounded capacity or an unbounded capacity, thus demonstrating the difficulty of finding conditions that are necessary and sufficient for the capacity to be bounded. 6 Intuitively, with this choice of {α ℓ } the channel can be divided into two parallel channels, one connecting the inputs and outputs at even times, and the other connecting the inputs and outputs at odd times. As both channels have the coefficientsα 0 =α 1 = .…”

“…where W is the considered bandwidth, T is the temperature of the receiver circuit block, and λ is a proportionality constant [5], [6], [7]. The transmission of information is typically associated with dissipation of energy into heat.…”

A MOS Model 9 Extension for GHz CMOS RF Circuit Design

“…2, consists of the standard MM9, extended with 5 capacitors, 6 resistors and 2 JUNCAP diode models [4]. Compared with previously published models [7], the addition of the capacitors C dse , C dbe , and C sbe is new. These capacitors accounts mainly for parasitic capacitance due to the interconnect metal in a multi-finger layout, and are important in obtaining adequate accuracy between measured and simulated data.…”

“…A major obstacle in designing CMOS RFICs is the lack of adequate models that predict device behavior at GHz frequencies. For low frequency analog and digital circuit design, compact MOS models such as MM9 (MOS model 9) [4], BSIM3v3 [5] and EKV [6] are widely accepted, but applying these models at GHz frequencies without parasitic effects gives inaccurate results [7]. A clear example of this is given by the s-parameter plots shown in Fig.…”

CMOS RF integrated circuits at 5 GHz and beyond

“…These effects are not correctly captured in the present generation of public-domain device models, so ad hoc accommodation of these phenomena is currently necessary for accurate simulation of noise and input impedance. Fortunately, this situation is temporary, for greatly improved RF-compatible models are being developed [12].…”