MPTG: a portable test generator for cache-coherent multiprocessors

O'Krafka, B.; Mandyam, S.; Kreulen, Jeffrey; Raghavan, R.; Saha, Avijit; Malik, N.

doi:10.1109/pccc.1995.472514

Cited by 14 publications

(5 citation statements)

References 7 publications

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“…Three representative automatic program generators are first reviewed: the multiprocessor test generator (MPTG) [O'Krafka et al 1995], the model-based test generator (MBTG) [Lichtenstein et al 1994;Aharon et al 1995], and the Architecture Verification Programs Generator (AVPGEN) [Chandra et al 1995]. MPTG is a deterministic test generator [O'Krafka et al 1995].…”

Section: Existing Approachesmentioning

confidence: 99%

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A BNF-based automatic test program generator for compatible microprocessor verification

Wang

Chiu

2004

ACM Trans. Des. Autom. Electron. Syst.

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A novel Backus-Naur-form-(BNF-) based method to automatically generate test programs from simple to complex ones for advanced microprocessors is presented in this paper. We use X86 architecture to illustrate our design method. Our method is equally applicable to other processor architectures by redefining BNF production rules. Design issues for an automatic program generator (APG) are first outlined. We have resolved the design issues and implemented the APG by a top-down recursive descent parsing method which was originated from compiler design. Our APG can produce not only random test programs but also a sequence of instructions for a specific module to be tested by specifying a user menu-driven file. In addition, test programs generated by our APG have the features of no infinite loop, not entering illegal states, controllable data dependency, flexible program size, and data cache testable. Our method has been shown to be efficient and feasible for the development of an APG compared with other approaches. We have also developed a coverage tool to integrate with the APG. Experimental evaluation of the generated test programs indicates that our APG, with the guidance of the coverage tool, only needs to generate a small number of test programs to sustain high coverage.

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Section: Existing Approachesmentioning

confidence: 99%

“…MPTG is a deterministic test generator [O'Krafka et al 1995]. It generates sets of test cases that are guaranteed to cause specific events to happen.…”

Section: Existing Approachesmentioning

confidence: 99%

A BNF-based automatic test program generator for compatible microprocessor verification

Wang

Chiu

2004

ACM Trans. Des. Autom. Electron. Syst.

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“…MPTG [19], [20] is another generator that addresses multiprocessor cache coherency verification. The reference machine model of MPTG is a combination of memory hierarchy and its associated coherency protocols and is declarative.…”

Section: ) Test Program Generationmentioning

confidence: 99%

EDA in IBM: past, present, and future

Darringer

Davidson

Hathaway

et al. 2000

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Abstract-Throughout its history, from the early four-circuit gate-array chips of the late 1960s to today's billion-transistor multichip module, IBM has invested in tools to support its leading-edge technology and high-performance product development. The combination of demanding designs and close cooperation among product, technology, and tool development has given rise to many innovations in the electronic design automation (EDA) area and provided IBM with a significant competitive advantage. This paper highlights IBM's contributions over the last four decades and presents a view of the future, where the best methods of multimillion gate ASIC and gigahertz microprocessor design are converged to enable highly productive system-on-a-chip designs that include widely diverse hardware and software components.

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“…Since hand-written tests are not desirable as the only mechanism in verifying a very complex design, testcase generators are developed so that various flavors of testcases can be randomly generated based on user-specified parameters. There are several very powerful testcase generators available at Somerset, such as, RTPG, MPTG [3], and GENIE. A more detailed analysis of all the generators can be found in [4].…”

Section: Testcase Generatorsmentioning

confidence: 99%

Multiprocessing design verification methodology for Motorola MPC74XX PowerPC microprocessor

Yen

Yin

2000

Proceedings of the 37th Conference on Design Automation - DAC '00

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Multiprocessing (MP) design verification has been one of the bottlenecks for high performance microprocessor design projects. The problem is getting worse as the design complexity increases and more cache structures are integrated into one single chip. The challenges that MP verification faces today include: huge chip/system simulation model sizes, long simulation cycles, relative inefficiency of the simulation tools compared to uniprocessor, and so on. To solve these challenging problems, we developed a new methodology and simulation flow for an upcoming design in Motorola's G4 generation of microprocessors, MPC74XX 1 . The key strategy of this methodology was to start MP verification as early as the design implementation started. The same methodology/tool set were first developed for MP verification at the unit level, then reused at the multiple-unit level, and eventually reused at the chip/ system level. In this paper, we will present the details of this methodology, and demonstrate why it is effective and efficient in detecting the majority of the MP functional defects at an early stage of the design phase.

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MPTG: a portable test generator for cache-coherent multiprocessors

Cited by 14 publications

References 7 publications

A BNF-based automatic test program generator for compatible microprocessor verification

A BNF-based automatic test program generator for compatible microprocessor verification

EDA in IBM: past, present, and future

Multiprocessing design verification methodology for Motorola MPC74XX PowerPC microprocessor

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