Multi-level 2-bit/cell operation utilizing Hf-based MONOS nonvolatile memory

Multi-level 2-bit/cell operation utilizing Hf-based metal/oxide/nitride/oxide/silicon nonvolatile memory with HfO2 and HfON tunneling layer

“…The Hf-based MONOS device formed in situ was fabricated on p-Si(100) substrate utilizing the typical gate-last process. 19,20) After the growth of 100 nm thick thermal SiO 2 , an active layer was patterned utilizing HF:HCl (1:19) solution. Then, channel-stop ion implantation and sourceand-drain (S/D) ion implantation were carried out.…”

“…Furthermore, we have reported the excellent electrical characteristics of a Hf-based MONOS structure formed in situ by ECR plasma sputtering with a HfO 2 and HfON tunneling layer (TL). 10,[14][15][16][17][18][19][20][21] The composition of each layer was reported, and it is designed using the reported results, previously. 10) In the case of HfO 2 , the SiO 2 interfacial layer (IL) is formed between the TL and Si substrate which increased the equivalent oxide thickness (EOT) and degraded operation speed.…”

“…10) In the case of HfO 2 , the SiO 2 interfacial layer (IL) is formed between the TL and Si substrate which increased the equivalent oxide thickness (EOT) and degraded operation speed. [19][20][21] Meanwhile, HfON suppresses the SiO 2 IL growth. [20][21][22][23] Therefore, Hf-based MONOS devices with HfON TL show fast-operation speed and low-voltage operation compared to HfO 2 TL by decreasing the EOT.…”

“…32) Moreover, we have reported 2-bit/cell operation utilizing Hfbased MONOS NVM with HfO 2 TL. 10,19) It shows 2-bit/cell operation with V PGM /t PGM of 6 V/2 ms with V DS of 1.5 V for localized programming operation. However, it is necessary to realize 2-bit/cell operation of the Hf-based MONOS device with low-voltage operation and clearly distinguish programmed states.…”

HfN multi charge trapping layers for Hf-based metal-oxide-nitride-oxide-Si nonvolatile memory

“…[3][4][5][6][7][8][9][10] We have reported the Hf-based MONOS NVM with high-k HfO 2 and HfN 1.1 dielectrics. [11][12][13][14][15][16][17] The Hf-based MONOS structures were fully in situ formed to improve the interface property by the reactive sputtering utilizing Hf target. The MONOS structures are consisted from HfN 0.5 gate electrode, HfO 2 blocking layer (BL), HfN 1.1 charge trapping layer (CTL), HfO 2 tunneling layer (TL), and we have demonstrated the multibit/cell operation.…”