Multilevel nonvolatile transistor memories using a star-shaped poly((4-diphenylamino)benzyl methacrylate) gate electret

Abstract

Multilevel nonvolatile transistor memories were fabricated using star-shaped poly((4-diphenylamino)benzyl methacrylate) (star-PTPMA) electret dielectric for charge storage and N,N 0 -bis(2-phenylethyl)perylene-3,4,9,10-bis(dicarboximide) (BPE-PTCDI) as an n-type semiconductor. Charges were controllably stored by applying a negative voltage bias, detected by shifting the threshold voltage, and this device retained the digital states even when the supplied voltage was removed. The multilevel data storage characteristics obtained by applying different gate voltages suggested that the device possessed nonvolatile write-many-read-many (WMRM) memory behaviors. The electronic charges were transferred and permanently accumulated in the gate electret from the restricting region of the star-PTPMA with well-defined charge trapping elements, but not in the case of linear-PTPMA. P-type pentacene was also used as a semiconductor layer to clarify the operating mechanism under a gate electric field. Our results demonstrated the significance of the architecture effect of the polymer electrets for nonvolatile organic transistor memory devices and their potentials in high-density data storage.

Flexible non-volatile optical memory thin-film transistor device with over 256 distinct levels based on an organic bicomponent blend

“…On the other hand, memories designed around electrets, that is, dielectric materials (usually polymers), or using polymer/electrolyte pairs exhibiting quasi-permanent electric charge or dipole polarization, have displayed the ability to perform as multilevel memories with different applied programming voltages. Although the observed switching ratios of over 10 8 have pushed them to the forefront of research on organic memories [27][28][29][30] , their unacceptably high programming voltages (up to ±200 V) and, most importantly, their low retention times (<10 4 s) are still major obstacles towards their integration into everyday electronics 31,32 . Storing charges in a metal or semiconductor layer by exploiting the principle of a floating gate located within the dielectric can be achieved with metallic nanoparticles, with each particle counting as a charge-storage site that is independent and isolated from other sites.…”

Single‐Crystal C60 Needle/CuPc Nanoparticle Double Floating‐Gate for Low‐Voltage Organic Transistors Based Non‐Volatile Memory Devices

“…Besides, the studied OFET memory devices with easy read-out of threshold voltage shift and a moderately high memory ratio of 10 3 -10 4 could exhibit multinary bit programmed states when different gate pulses are applied, further increasing the data storage density. [ 23,45 ] We summarize the advantages of the presented heterostructured CuPc/N-C 60 double fl oating-gate organic non-volatile memory as follows: i) multinary bit operation can be performed through double fl oating-gate layers with ambipolar trapping nature that enlarges the memory window and increases the memory capacity compared to a conventional single fl oatinggate device, as it creates different transistor characteristics from one OFET memory device. ii) The low-voltage driven OFET memory including a high k dielectric has a low energy consumption and it also has good electrical properties such as mobilities and ON/OFF ratio.…”

Proton induced multilevel storage capability in self-assembled indium-zinc-oxide thin-film transistors

“…On the contrary, protons will be dragged back into the nanogranular SiO 2 gate dielectric when a large negative gate voltage is applied. Then, the IZO channel would be depleted, 17,32 and the I ds will decrease abruptly as shown in Fig. 2(c).…”