12th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC'06)
DOI: 10.1109/async.2006.23
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Multiple-Rail Phase-Encoding for NoC

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Cited by 11 publications
(6 citation statements)
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“…This eliminates most of the static power consumption associated with a DLL-or PLL-based link receiver and also makes the link "fire-andforget" as the data can be recovered instantaneously. However, currently known transition signaling techniques, such as 1-of-n level encoded transition signaling (LETS) [8], m-of-n RTZ encoding [9], relative order-based encoding [10], and relative time-based encoding [11], achieve this at the cost of substantially lower effective data bandwidth compared to conventional NRZ level encoded links. Furthermore, their use has been limited to short-distance and low-speed (<2 Gb/s) bus-based communication.…”
Section: Introductionmentioning
confidence: 99%
“…This eliminates most of the static power consumption associated with a DLL-or PLL-based link receiver and also makes the link "fire-andforget" as the data can be recovered instantaneously. However, currently known transition signaling techniques, such as 1-of-n level encoded transition signaling (LETS) [8], m-of-n RTZ encoding [9], relative order-based encoding [10], and relative time-based encoding [11], achieve this at the cost of substantially lower effective data bandwidth compared to conventional NRZ level encoded links. Furthermore, their use has been limited to short-distance and low-speed (<2 Gb/s) bus-based communication.…”
Section: Introductionmentioning
confidence: 99%
“…This section demonstrates the application of PG-algebra to designing the multiple rail phase encoding controllers [4]. They use several wires for communication, and data is encoded by the order of occurrence of transitions in the communication lines.…”
Section: A Phase Encodersmentioning
confidence: 99%
“…In the phase-encoding [6] this is achieved by mutual adjudication between the wires. In the dual-rail framework, exploited in this paper, we build on the dual rail solution by introducing a pair of reference wires which can be compared with the pair of data wires in order to obtain the original transmitted data.…”
Section: Figure 1 Current Asynchronous Linksmentioning
confidence: 99%
“…Our proposed approach offers a similar amount of wires per bit as dual rail and similar number of transitions per bit as LEDR and 1 of 4 as the number of bits increase from the point of view of power on the link and resilience to transients that multiple rail phaseencoding offers but with a linear growth in transmitter and receiver complexity. [7] 2 1 N Linear Phase-enc [6] w/n w/n Y Square S-C Green [14] 3.75 -Y Linear Proposed 2+2/n 1+1/n Y Linear where n = number of bits and (w-1)! < 2^n < w!…”
Section: Proposed Resilient Linkmentioning
confidence: 99%
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