SC16: International Conference for High Performance Computing, Networking, Storage and Analysis 2016
DOI: 10.1109/sc.2016.44
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MUSA: A Multi-level Simulation Approach for Next-Generation HPC Machines

Abstract: large shared-memory multi-core configurations [16,28,35]. For example, OpenMP, the most popular approach for shared memory programming, has significantly evolved and currently incorporates advanced features such as tasking support [4,39]. For all these reasons, parallel operations such as scheduling and synchronization are expected to become key system software components. As a result, simulators targeting nextgeneration HPC systems must take into account such parallel operations performed at the runtime syste… Show more

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Cited by 32 publications
(35 citation statements)
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References 49 publications
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“…Skeletons are code extractions of the most important parts of a complex application whereas we only modify a few dozens of lines of HPL before emulating it with SMPI. Finally, it is important to understand that the approach we propose is intended to help studies at the level of the whole machine and application, not the influence of microarchitectural details as intended by MUSA [15].…”
Section: Related Workmentioning
confidence: 99%
“…Skeletons are code extractions of the most important parts of a complex application whereas we only modify a few dozens of lines of HPL before emulating it with SMPI. Finally, it is important to understand that the approach we propose is intended to help studies at the level of the whole machine and application, not the influence of microarchitectural details as intended by MUSA [15].…”
Section: Related Workmentioning
confidence: 99%
“…To evaluate TaskGenX we make use of the TaskSim simulator [16,24]. TaskSim is a trace driven simulator, that supports the specification of homogeneous or heterogeneous systems with many cores.…”
Section: Simulationmentioning
confidence: 99%
“…TaskSim is a trace driven simulator, that supports the specification of homogeneous or heterogeneous systems with many cores. The tracing overhead of the simulator is less than 10% and the simulation is accurate as long as there is no contention in the shared memory resources on a real system [16]. By default, TaskSim allows the specification of the amount of cores and supports up to two core types in the case of heterogeneous asymmetric systems.…”
Section: Simulationmentioning
confidence: 99%
“…Apart from assessing requirements and enabling software and future technologies, ARM and its partners have focused on research for future processor technologies including architecture and micro-architecture solutions for high-end systems with a focus on HPC. Simulation tools are critical for research and development and several new methodologies have been proposed and implemented to enable simulation of large HPC systems [15,12,11,10,8].…”
Section: Road To Hpcmentioning
confidence: 99%