NBTI: An Atomic-Scale Defect Perspective

Abstract

We utilize a combination of MOSFET-gate controlled diode DC-IV measurements and a very sensitive electrically-detected electron spin resonance technique called spindependent recombination to observe and identify defect centers generated during NBTI in fully processed SiO 2 and plasma nitrided oxide (PNO)-based pMOSFETs. In SiO 2 devices, we observe the NBTI-induced generation of two Si/SiO 2 interface silicon dangling bond centers (P b0 and P b1 ) and very likely an oxide silicon dangling bond center (E′). Our observations indicate that both P b0 and P b1 defects play major roles in these SiO 2 -based devices and also suggest that E′ centers could play an important role. In PNO devices, we observed the NBTI-induced generation of a new defect center which is fundamentally different from the P b0 /P b1 defects generated during NBTI in SiO 2 devices. Our results indicate that it plays a dominating role in NBTI-induced interface state generation in thin PNO devices and also exhibits a post-negative bias temperature stress (NBTS) recovery. Although we observe different interface state defects, we observed essentially equivalent activation energies in both the SiO 2 and PNO devices. [Keywords: negative bias temperature instability, interface traps, MOSFET, spindependent recombination]

A comprehensive model for PMOS NBTI degradation: Recent progress

“…In addition to time exponents, the activation energy of NBTI is also extensively studied in pre-2003 literature and various report suggest that E A $ 0.12-0.15 eV [1,8,20,28]. If we assume that…”

“…Since the specific values of activation energies of forward dissociation, E F , reverse annealing, E R , and diffusion coefficient, E D , were unknown, the inconsistency between time-exponent n and temperature activation E A was initially not highlighted. However, generalized scaling arguments consistently showed that E A $ E D /n [1,4], with E F $ E R [1,2,4,28]. The measured E A therefore provided a direct measure of E D $ 0.5-0.6 eV, which in turn implicated H 2 diffusion [29]!…”

Hot-carrier induced dielectric breakdown (HCIDB) challenges of a new high performance LDMOS generation

“…To reach this aim a new embedded-power 120nm technology has been developed offering high performance LDMOS devices for 12V and 24V with a thin 5.2nm gate oxide, a novelty for these voltage classes. We achieved a new industry benchmark of R ON equal to 4mΩ×mm 2 @BVdss=20V, but several challenges had to be solved for a productive reliable technology [1][2][3][4][5][6][7][8][9][10][11][12][13]. The transistors have to be optimized to achieve reliable Safe Operating Area (SOA) with low device R ON (high efficiency) and targeted breakdown voltages.…”

Negative Bias Stressing Interface Trapping Centers in Metal Gate Hafnium Oxide Field Effect Transistors Using Spin Dependent Recombination

“…One of the most vexing problems of conventional Si/SiO 2 and SiO 2 /nitrided oxide MOS devices is the negative bias temperature instability (NBTI) which causes reduced drain current and shifts in threshold voltage when pMOSFETs are subjected to a negative gate bias, typically at an elevated temperature [1][2][3][4] . Although progress has been made recently in identifying atomic scale NBTI induced defects in Si/SiO 2 based devices [5][6][7] , not much is known about NBTI defects in high-K based MOS devices. In this study, we combine electrical and magnetic resonance measurements to investigate the atomic scale mechanisms of NBTI in HfO 2 based devices.…”

“…Figure 5 compares moderately short term and long term NBTI SDR traces from a representative Si/SiO 2 device 7 . The poly gate SiO 2 devices has an equivalent oxide thickness of 75 nanometers [5][6][7] . A precise match between SDR measurements of NBTI defects in HfO 2 and SiO 2 based devices isn't possible because, in the SiO 2 based devices, strong recovery effects preclude SDR observations for very short times at any temperature.…”