Nested Miller compensation capacitor sizing rules for fast-settling amplifier design

Pugliese, Andrea; Cappuccino, G.; Cocorullo, G.

doi:10.1049/el:20050398

Cited by 31 publications

(34 citation statements)

References 1 publication

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“…As the derived equations mathematically show that the proposed methodology described later satisfies these conditions automatically. Under these circumstances, the open-loop transfer function of Figure 1(a) is as follows [1][2][3] …”

Section: H Aminzadehmentioning

confidence: 99%

“…The contribution of damping factor in settling response of a three-stage amplifier is studied in [3]. Hence, the relations between phase margin, damping factor, and compensation capacitors are obtained.…”

Section: Introductionmentioning

confidence: 99%

“…Another contribution of this work is to include non-linear section of step response into the proposed analysis. This section plays a key role in value of total settling time and excluding it (similar to the majority of design methodologies already proposed [2][3][4][5][6][7]) might lead to unacceptable error.…”

Section: Introductionmentioning

confidence: 99%

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Three‐stage nested‐Miller‐compensated operational amplifiers: Analysis, design, and optimization based on settling time

Aminzadeh

2011

Circuit Theory & Apps

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SUMMARYIn analog signal-processing applications, settling performance of the employed operational amplifiers (opamps) is usually of great matter. Under low-voltage environment of modern technologies where only a few transistors are allowed to be stacked, three-stage amplifiers are gaining more interest. Unfortunately, design and optimization of three-stage opamps based on settling time still suffer from lack of a comprehensive analysis of the settling behavior and closed-form relations between settling time/error and other parameters. In this paper, a thorough analysis of the settling response of three-stage nestedMiller-compensated opamps, including linear and non-linear sections, is presented. This analysis leads to a design methodology which determines the circuit requirements for desired settling time/error. Based on settling time, it allows optimizations in power consumption and area.

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Section: H Aminzadehmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Three‐stage nested‐Miller‐compensated operational amplifiers: Analysis, design, and optimization based on settling time

Aminzadeh

2011

Circuit Theory & Apps

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“…There are several publications considering the optimization of settling performance in the design of multistage OTAs [7][8][9][10][11][12][13][14]. These publications have been aimed to improve the linear settling time by its optimization using systematic design methodologies.…”

Section: Introductionmentioning

confidence: 99%

A three-stage class AB operational amplifier with enhanced slew rate for switched-capacitor circuits

Golabi

Yavari

2015

Analog Integr Circ Sig Process

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In this paper, a three-stage class AB operational transconductance amplifier (OTA) with large slew rate is presented. The reversed nested Miller compensation technique is used to stabilize the proposed OTA, allowing the slew rate enhancement to be achieved by using class AB input and output stages. A flipped-voltage follower cell in the first stage in combination with a switched-capacitor level shifter in the last stage are utilized to implement the class AB operation. Circuit level simulation results are provided using HSPICE and a 90 nm CMOS technology which show 306 % enhancement in the large-signal FoM with approximately the same power dissipation compared to the class A OTA. The achieved settling time with 0.02 % accuracy for the proposed class AB and conventional class A OTAs are 7.5 and 15.3 ns, respectively.

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“…For this scheme, conventional criteria for sizing compensation capacitance C C1 and C C2 are aimed at obtaining a maximally-flat closed-loop frequency response [1], although this choice is not the best one when the time response of the amplifier has to be improved [2]. Criteria [1] and [2] for NMC, as well as criteria in [3], [4] for other nested-Miller improved techniques, are based on simplified transfer functions of the real circuit which neglect the amplifier parasitic capacitances. These simple expressions allow critical aspects to be taken into account in the early-design phase, but the network compensation rules may lead to inaccurate or incorrect results i.e.…”

Section: Introductionmentioning

confidence: 99%

Design methodology of nested-Miller amplifiers for small capacitive loads

Pugliese

Cappuccino

Cocorullo

2007

2007 18th European Conference on Circuit Theory and Design

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A novel methodology for designing the compensation network of nested-Miller amplifiers is proposed. Constructing the root contours of the nested structure, the method allows pole positioning to be carried out for small capacitive loads, as occurring in discrete-time applications. At the same time, it allows critical parameters such as the phase margin of the amplifier to be controlled by means of simple analytical expressions. Examples of its application to three-stage schemes are also presented.

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Nested Miller compensation capacitor sizing rules for fast-settling amplifier design

Cited by 31 publications

References 1 publication

Three‐stage nested‐Miller‐compensated operational amplifiers: Analysis, design, and optimization based on settling time

Three‐stage nested‐Miller‐compensated operational amplifiers: Analysis, design, and optimization based on settling time

A three-stage class AB operational amplifier with enhanced slew rate for switched-capacitor circuits

Design methodology of nested-Miller amplifiers for small capacitive loads

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