2011
DOI: 10.3389/fnins.2011.00073
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Neuromorphic Silicon Neuron Circuits

Abstract: Hardware implementations of spiking neurons can be extremely useful for a large variety of applications, ranging from high-speed modeling of large-scale neural systems to real-time behaving systems, to bidirectional brain–machine interfaces. The specific circuit solutions used to implement silicon neurons depend on the application requirements. In this paper we describe the most common building blocks and techniques used to implement these circuits, and present an overview of a wide range of neuromorphic silic… Show more

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Cited by 1,177 publications
(876 citation statements)
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References 104 publications
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“…Fig.14 shows a hypothetical engineering system using some of the above tools (from [47,25]). -Moving object recognition ( fig.…”
Section: Snn Software and Hardware Implementations To Support Stprmentioning
confidence: 99%
See 1 more Smart Citation
“…Fig.14 shows a hypothetical engineering system using some of the above tools (from [47,25]). -Moving object recognition ( fig.…”
Section: Snn Software and Hardware Implementations To Support Stprmentioning
confidence: 99%
“…-jAER (http://jaer.wiki.sourceforge.net) [23]; -Software simulators, such as Brian [16], Nestor, NeMo [79],etc; -Silicon retina camera [23]; -Silicon cochlea [107]; -SNN hardware realisation of LIFM and SDSP [47][48][49][50]; -The SpiNNaker hardware/software environment [89,116]; -FPGA implementations of SNN [56]; -The IBM LIF SNN chip, recently announced. Fig.14 shows a hypothetical engineering system using some of the above tools (from [47,25]).…”
Section: Snn Software and Hardware Implementations To Support Stprmentioning
confidence: 99%
“…While the CMOS based neurons are nowadays commercially available, 1 the appropriate candidate for the synapse is still under discussion. There are two main possible ways of synapse realization: a digital one (e.g., as the Static Random Access Memory 2 or floating gate transistor 3 ) and an analogue one (memristive device). 4 The main advantage of the first one is its full integration with the standard CMOS technology.…”
Section: Introductionmentioning
confidence: 99%
“…The optoelectronic hardware platform is predicted to achieve 20 aJ/synapse event. By comparison, many CMOS systems are on the order of 20 pJ/synapse event [10,25,26].…”
Section: Introductionmentioning
confidence: 99%