IECON 2013 - 39th Annual Conference of the IEEE Industrial Electronics Society 2013
DOI: 10.1109/iecon.2013.6700166
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New 3-level submodules for a modular multilevel converter based HVDC system with advanced features

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Cited by 17 publications
(9 citation statements)
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“…Although capacitor voltage balancing is generally considered possible under all operating conditions, this is not always the case for certain SMs. This category includes, most prominently, SMs with neutral-point voltages such as the NPC-SM [31], the T-type SM [65] (both TSM1 and TSM2 [47]) and the ANPC-SM [32]. The main reason for the reduced voltage-balancing capability is the inability to charge or discharge the two capacitors (C 1 and C 2 ) for the same time under the operation of unity power factor.…”
Section: Sms With Voltage Balancing Limitationsmentioning
confidence: 99%
“…Although capacitor voltage balancing is generally considered possible under all operating conditions, this is not always the case for certain SMs. This category includes, most prominently, SMs with neutral-point voltages such as the NPC-SM [31], the T-type SM [65] (both TSM1 and TSM2 [47]) and the ANPC-SM [32]. The main reason for the reduced voltage-balancing capability is the inability to charge or discharge the two capacitors (C 1 and C 2 ) for the same time under the operation of unity power factor.…”
Section: Sms With Voltage Balancing Limitationsmentioning
confidence: 99%
“…PS‐PWM is widely used in conventional MMCs because of easy voltage balancing (due to the even distribution of power across the submodules) and smaller filtering requirements (the dominant harmonic of the output voltage is located at higher frequency) [18]. However, for the A‐MMC, since the submodules have asymmetric voltages of VC and 2VC, a combination of phase‐shifted and level‐shifted carriers called hybrid carriers is used [15].…”
Section: Modulation and Controlmentioning
confidence: 99%
“…The full‐bridge (FB) or double star modules [12] and clamp double (CD) modules [13] have also been discussed for inherent DC fault handling capability, at the expense of additional semiconductor switches. Several multi‐level module configurations have been investigated previously [14, 15] to reduce the overall system footprint. In the literature, asymmetric multilevel inverters are known to achieve higher number of levels in the output voltage with less number of converter modules, hence reducing the overall converter size and cost.…”
Section: Introductionmentioning
confidence: 99%
“…4 (right). The 3-level submodule has added advantages over the conventional halfbridge submodule as it results in nearly half the submodule requirements resulting in a more compact structure and also significantly reduced semiconductor losses [19].…”
Section: (B)mentioning
confidence: 99%
“…This results in a much compact infrastructure. Also the 3-level submodules have considerable lower semiconductor losses [19].…”
Section: Introductionmentioning
confidence: 99%