New Current-Mirror Sense Amplifier Design for High-Speed SRAM Applications

Hsu, Chun-Lung; Ho, Mean-Hom; Lin, Chin‐Feng

doi:10.1093/ietfec/e89-a.2.377

Cited by 5 publications

(3 citation statements)

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“…Several sense amplifiers, such as a current-mirror sense amplifier (CMSA) and a current latch sense amplifier (CLSA), were investigated to improve their performance [3], [4], [5]. The CMSA, however, dissipates static current and increases power dissipation.…”

Section: Introductionmentioning

confidence: 99%

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High current efficiency sense amplifier using body-bias control for ultra-low-voltage SRAM

Masuda

Hirose

Matsumoto

et al. 2011

2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS)

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We propose a current latch sense amplifier with a current-reuse technique (CLSA-w/CR). The CLSA-w/CR is capable of high-speed pre-charging with little increase in power dissipation. The CLSA-w/CR controls body bias voltages of pre-charge transistors in a conventional CLSA. Even though a forward body bias control over MOSFETs can achieve high speed operation of the circuit, it induces large substrate leakage current and increases the power dissipation of the circuit. The CLSA-w/CR we propose, however, can achieve high-speed pre charging without increasing power dissipation. We evaluated the performance of the CLSA-w/CR using SPICE with a set of 0.35-/.Lm standard CMOS parameters. The pre-charge time decreased by 86.9% and the power dissipation increased by only 8.6%compared to that of a conventional CLSA. The CLSA-w/CR showed high-speed pre-charging with small power overhead.

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Section: Introductionmentioning

confidence: 99%

“…Section III describes our CLSA-w/CR and Section IV discusses the results. Figure 1 shows a schematic of a conventional CLSA [4], [5]. This CLSA consists of nine transistors.…”

Section: Introductionmentioning

confidence: 99%

High current efficiency sense amplifier using body-bias control for ultra-low-voltage SRAM

Masuda

Hirose

Matsumoto

et al. 2011

2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS)

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“…These highly capacitive wires are also important sources of power dissipation during the read and write operations [5][6]. The current mode Sense Amplifier (SA), which has the ability to quickly amplify a small differential signal on the Bit-Lines (BLs) and Data-Lines (DLs) to the full CMOS logic level without requiring a large voltage swing on these lines, is widely used as one of the most effective ways to reduce both the sensing delay and the power consumption of the SRAM [7][8][9][10][11][12][13][14][15][16][17].…”

Section: Introductionmentioning

confidence: 99%

A full current-mode sense amplifier for low-power SRAM applications

Shern

Kong

et al. 2008

APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems

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A full current-mode sense amplifier is presented. It extensively utilizes the cross-coupled inverters for both local and global sensing stages, hence achieving ultra low-power and ultra high-speed properties simultaneously. Its sensing delay and power consumption are almost independent of the bit-and dataline capacitances. Extensive pre-layout simulation results based on a 1.8 V/0.18 μm CMOS technology from Chartered Semiconductor Manufacturing Ltd. (CHRT) have verified that the new SA outperforms the best published designs with 64% and 45% speed and power consumption improvements respectively. Furthermore, the new design can operate down to a supply voltage of 1 V. These attributes of the proposed SA make it judiciously appropriate for the use in the contemporary highcomplexity systems, which continually crave for low-power and high-speed characteristics.

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Design and Analysis of High Speed Body Bias Control and CLSA Sense Amplifier

Reger¹,

Verma²,

Jaiswal³

et al. 2013

2013 International Conference on Machine Intelligence and Research Advancement

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This paper deals with a design and analysis of current latch sense amplifier with a current-reuse technique (Body bias control sense amplifier) and conventional CLS A sense amplifier. The Body bias control sense amplifier is capable of high-speed pre-charging with little increase in power dissipation. Body bias control sense amplifier also controls body bias voltages of pre-charge transistors rather than in a conventional CLS A. Also we find that sensing time of body bias control sense amplifier is less as it depends upon threshold voltage. We also verify the various result like Slew Rate, Power consumption, Voltage Gain, Offset Voltage Sensitivity at 180 nano meter technology for both type of sense amplifier. From these result we see that when Vdd increases circuit ability to avoid the noise increases but power consumption also increases and accordingly current consumption increases .Simulation result shows that speed of S ense Amplifier decreases but interesting improvement in current consumption is obtained. S ensitivity of conventional CLS A sense amplifier is 50mV and for body bias control sense amplifier is 35 mV.

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New Current-Mirror Sense Amplifier Design for High-Speed SRAM Applications

Cited by 5 publications

References 0 publications

High current efficiency sense amplifier using body-bias control for ultra-low-voltage SRAM

High current efficiency sense amplifier using body-bias control for ultra-low-voltage SRAM

A full current-mode sense amplifier for low-power SRAM applications

Design and Analysis of High Speed Body Bias Control and CLSA Sense Amplifier

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