New gettering using misfit dislocations in homoepitaxial wafers with heavily boron-doped silicon substrates

Kikuchi, Hiroaki; Kitakata, M.; Toyokawa, Fumitoshi; Mikami, Masato

doi:10.1063/1.100953

Cited by 16 publications

(4 citation statements)

References 8 publications

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“…10 The DSB interface was reported to have screw dislocations along the ͗110͘ direction coming from the inevitable misorientation between Si ͑110͒ and ͑100͒ substrates. 30 However, our calculations revealed that the coherent region of the DSB interface is also an efficient gettering site. That is, the smaller results in the larger interval.…”

Section: Gettering Efficiencymentioning

confidence: 71%

Molecular simulation on interfacial structure and gettering efficiency of direct silicon bonded (110)/(100) substrates

Kariyazaki

Aoki

Izunome³

et al. 2010

Journal of Applied Physics

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An all-electron density functional theory study of the structure and properties of the neutral and singly charged M 12 and M 13 clusters: M = Sc-Zn Influence of 3d transition metals on the stability and electronic structure of MgH2 J. Appl. Phys. 111, 093720 (2012); 10.1063/1.4714549 When does the non-variational nature of second-order Møller-Plesset energies manifest itself? All-electron correlation energies for open-shell atoms from K to Br J. Chem. Phys. 136, 054107 (2012); 10.1063/1.3679969Atomic diffusion bonding of wafers with thin nanocrystalline metal films Direct silicon bonded ͑DSB͒ substrates with ͑110͒/͑100͒ hybrid orientation technology are attracting considerable attention as a promising technology for high performance bulk complementary metal-oxide semiconductor technology. We have investigated the structure and the gettering efficiency of the ͑110͒/͑100͒ interface parallelling each ͗110͘ direction ͑DSB interface͒ by molecular dynamics ͑MD͒ and first-principles calculation. In MD calculations, initial calculation cells of 15 atomic-configurations with coincidence-site lattices were prepared. It was found that ͑i͒ the calculated DSB interface was stable independent of the initial atomic-configurations and ͑ii͒ the interfacial structures were essentially the same among the calculated models. Moreover, the calculated interfacial structure corresponds to the reported TEM observation. The first-principles calculation showed that Si atoms in the DSB interface formed covalent bonding. The dangling bonds in Si ͑110͒ and ͑100͒ surfaces disappeared due to restructuring in the DSB interface. Furthermore, the DSB interface, which exists just below the device active region, was found to be an efficient gettering site for Al, Sc, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Zn, and Hf atoms.

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Section: Gettering Efficiencymentioning

confidence: 71%

Molecular simulation on interfacial structure and gettering efficiency of direct silicon bonded (110)/(100) substrates

Kariyazaki

Aoki

Izunome³

et al. 2010

Journal of Applied Physics

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“…Such gettering effects have been invoked in a number of papers [6,14-201. In particular, striking observations of impurity segregation at dislocations were reported by Marek et al [16] on GaAs wafers, by using a PL imaging technique of very high spatial resolution, and by Sekiguchi and Sumino [I71 in CL imaging. Also, direct observations by transmission electron microscopy (TEM) of segregation around misfit dislocations in silicon epitaxial structures, were reported by Lee et al [I91 and Kikuchi et al [20].…”

Section: Introductionmentioning

confidence: 91%

DLDS-related near-bandgap photoluminescence peak in current degraded GaAlAs LEDS

Madelon¹,

Ajroudi²,

Fortini³

1991

Semicond. Sci. Technol.

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Spatially resolved photoluminescence measurements with a resolution of 4pm, have been carried out in the active p-region of n-p GaAlAs light-emitting single heterojunctions, having undergone 2000 h strong current ageing. The degraded material exhibits a characteristic pattern of dark-line defects (DLDS) well revealed in cathodoluminescence topographs and identified as dense dislocation networks in easy-glide crystallographic planes. When the scanning spot goes from undergraded to degraded zones containing oms, the dominant near-bandgap photoluminescence peak due to donor-to-acceptor recombination is gradually replaced by an initially weak satellite, 15 meV above, attributed to unintentionally present impurities, likely carbon. This striking behaviour reveals that a redistribution of impurities or defects, connected with the genering activity of dislocations in DLDS, occurs during current ageing. Such segregation effects induced by the stress field around dislocations have been. indeed, often observed in growth or anneal processing.

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“…Misfit dislocations are generated at the interface between the epitaxial layer and the low concentration substrate by mismatch of the lattice constant. However, it has been reported that misfit dislocations do not reduce the device performance [2]. Figure 5(b) shows an X-ray topography image of a wafer that has undergone a slip dislocation acceleration process, in which the rate of temperature change is increased.…”

Section: Influence Of Bulk Micro Defectsmentioning

confidence: 97%

Selection of silicon wafer for power devices and the influence of crystal defects including impurities

Yamamoto

Hashizume

2011

Phys. Status Solidi (c)

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Silicon wafers used as starting materials are significantly different in MOS‐LSIs and power devices, because each device requires a specific structure. For power devices, FZ wafers or epitaxial wafers with a thick epitaxial layer are widely used. Epitaxial wafers are advantageous with respect to low breakdown voltage devices, and FZ wafers are advantageous for high breakdown voltage devices. The influence of COPs formed during CZ crystal growth on highly miniaturized MOS‐LSIs is significant; however, COPs do not pose a problem to power devices prepared from FZ or epitaxial wafers. BMDs and slip dislocations have caused device failures on power devices where the device operation layer is deep and the process temperature is high. On the other hand, misfit dislocations which are generated with high concentration do not introduce device failures. Failure due to physical contamination is observed when Fe has introduced a failure to the power device. Cu/pit failures occur due to chemical contamination by Cu only for more highly miniaturized MOS‐LSIs, but are not a problem for power devices whose miniaturization level is not required as that for MOS‐LSIs. (© 2011 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)

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New gettering using misfit dislocations in homoepitaxial wafers with heavily boron-doped silicon substrates

Cited by 16 publications

References 8 publications

Molecular simulation on interfacial structure and gettering efficiency of direct silicon bonded (110)/(100) substrates

Molecular simulation on interfacial structure and gettering efficiency of direct silicon bonded (110)/(100) substrates

DLDS-related near-bandgap photoluminescence peak in current degraded GaAlAs LEDS

Selection of silicon wafer for power devices and the influence of crystal defects including impurities

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