New PMOS LTPS–TFT pixel for AMOLED to suppress the hysteresis effect on OLED current by employing a reset voltage driving

Lee, Jae‐Hoon; Park, Sang−Geun; Han, Shuai; Han, Min−Koo; Park, KeeChan

doi:10.1016/j.sse.2007.10.030

Cited by 18 publications

(11 citation statements)

References 7 publications

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“…For practical applications, it was important to have the bias independent reliability and a number of groups have studied the stability of a-IGZO TFTs [3][4][5][6][7]. Particularly, the hump characteristics were considered as one of the critical issues during the operation in TFT displays affecting pixel brightness [8]. It has been reported that the stability of oxide TFTs are influenced by the absorption/ desorption of gas molecules from ambient atmosphere which can be prevented by forming the passivation/capping layer on the exposed back-channel surface.…”

Section: Introductionmentioning

confidence: 99%

Anomalous Stress-Induced Hump Effects in Amorphous Indium Gallium Zinc Oxide TFTs

Kim¹,

Jeong²,

Yun³

et al. 2012

Transactions on Electrical and Electronic Materials

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In this paper, we investigated the anomalous hump in the bottom gate staggered a-IGZO TFTs. During the positive bias stress, a positive threshold voltage shift was observed in the transfer curve and an anomalous hump occurred as the stress time increased. The hump became more serious in higher gate bias stress while it was not observed under the negative bias stress. The analysis of constant gate bias stress indicated that the anomalous hump was influenced by the migration of positively charged mobile interstitial zinc ion towards the top side of the a-IGZO channel layer.

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Section: Introductionmentioning

confidence: 99%

Anomalous Stress-Induced Hump Effects in Amorphous Indium Gallium Zinc Oxide TFTs

Kim¹,

Jeong²,

Yun³

et al. 2012

Transactions on Electrical and Electronic Materials

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“…Traps (or even border traps) at the dielectric/pentacene interface might account for the hysteresis measured during the C-V measurements. Finally, some authors reported about trap in the organic semiconductor [17], [26]- [27] or bias-induced charged defects [27], which, in turn, move in the organic semiconductor, inducing long-lived threshold voltage variations.…”

Section: Discussionmentioning

confidence: 99%

“…However, still few publications have addressed the stability of the electrical characteristics of OTFTs subjected to bias [13]- [16]. The bias stability is an issue in several applications, but it is crucial especially for AMOLED displays [17]- [22]. From this application viewpoint, the light sensitivity is also a concern, because it might enhance the bias effects.…”

Section: Introductionmentioning

confidence: 99%

Light, bias, and temperature effects on organic TFTs

Wrachien

Cester

Bellaio

et al. 2010

2010 IEEE International Reliability Physics Symposium

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In this work we present the instabilities observed in organic Thin-Film Transistors when subjected to stress test in different bias, temperature and illumination conditions. C-V measurements, indicate the presence of two distinct trapping phenomena. Appreciable charge trapping can be achieved using relatively high biases for long times (1000s). Illumination strongly enhances charge trapping only under positive gate biases, while it has no effect on the charge trapping/detrapping under negative gate bias. Charge detrapping is thermally activated coherently with trapping/detrapping at the SiO 2 /pentacene interface from hydrogenoid species. A first order model explaining the observed relaxation kinetics is also presented.

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“…Compared with amorphous‐silicon (a‐Si), which is the most common material for practical manufacturing with polycrystalline‐silicon (poly‐Si), poly‐Si TFTs are preferred as pixel devices due to their better electrical characteristics and stability. However, the hysteresis phenomenon in LTPS TFTs resulting in a threshold‐voltage ( V TH ) shift can cause image sticking in the display . Residual images due to the hysteresis, such that the previous display image remains apparent in the subsequent image, may be a severe problem observed in conventional LTPS TFT pixels composed of 2‐TFTs .…”

Section: Introductionmentioning

confidence: 99%

“…However, the hysteresis phenomenon in LTPS TFTs resulting in a threshold-voltage (V TH ) shift can cause image sticking in the display. 3 Residual images due to the hysteresis, such that the previous display image remains apparent in the subsequent image, may be a severe problem observed in conventional LTPS TFT pixels composed of 2-TFTs. 4 The cause of the hysteresis phenomenon has been reported by many research groups as trap recharging located in the intra-grain, grain boundary, and interface between the active layer and gate insulator.…”

Section: Introductionmentioning

confidence: 99%

Hysteresis analysis in excimer‐laser‐annealed low‐temperature polycrystalline‐silicon thin‐film transistors

et al. 2012

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To analyze the hysteresis phenomenon in p‐channel low‐temperature polycrystalline‐silicon thin‐film transistors (LTPS TFTs), the direct correlation between the hysteresis and the interface (Nit) and the grain‐boundary trap density (Ntrap) has been investigated. To fabricate LTPS TFTs with different electrical properties and trap types, the thickness of a‐Si was varied from 30 to 80 nm and crystallized by the excimer‐laser‐anneal (ELA) method. The interface trap density is extracted from the subthreshold slope (SS) and low‐high‐frequency C‐V analysis, while the grain‐boundary trap density is extracted by the Levinson and Proano method. The LTPS TFTs with smaller hysteresis exhibited a lower trap density. From the correlation between extracted parameters, the hysteresis seems to be more dependent on Nit and decreases when the film thickness increases to 80 nm while the Ntrap is almost the same in all devices.

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New PMOS LTPS–TFT pixel for AMOLED to suppress the hysteresis effect on OLED current by employing a reset voltage driving

Cited by 18 publications

References 7 publications

Anomalous Stress-Induced Hump Effects in Amorphous Indium Gallium Zinc Oxide TFTs

Anomalous Stress-Induced Hump Effects in Amorphous Indium Gallium Zinc Oxide TFTs

Light, bias, and temperature effects on organic TFTs

Hysteresis analysis in excimer‐laser‐annealed low‐temperature polycrystalline‐silicon thin‐film transistors

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