NiSi Schottky Barrier Process-Strained Si (SB-PSS) CMOS Technology for High Performance Applications

Abstract

State-of-the-art process-strained Si (PSS) technology featuring single-NiSi Schottky source/drain (S/D) and ultra-thin gate oxide of 1.2 nm is demonstrated for L gate down to 39 nm. +10% performance boost of Schottky-Barrier (SB)-PSS NMOS, as compared to its non-Schottky counterpart, is demonstrated due to series resistance reduction of the silicide S/D and enhanced strain effects. Highest SB-PSS PMOS drive current of 821 µA/µm (at V D = −1.2V and I off =100 nA/µm) is recorded when integrated with recessed Si 1-x Ge x S/D stressor.

Small-signal analysis of high-performance p- and n-type SOI SB-MOSFETs with dopant segregation

“…4 indicate various results of MOSFETs with Schottky contacts without dopant segregation. The thick gate oxide of around 3.5 nm yields an effective field at V gs À V t = 3 V which is comparable to V gs = 1.1 V for a 1.2 nm oxide, the standard value for benchmarking [15][16][17]. Typical transfer and output characteristics of p-type SBMOSFETs with a gate length of 80 nm are presented in Fig.…”

“…The inset of the transfer characteristics shows I on for different gate lengths at V gs À V t = 3 V and V ds = 1I on À I off state-of-the-art of n-type SB-MOSFETs[15][16][17]. The SB-MOSFETs of this work have an oxide thickness of t ox = 3.5 nm and are measured at V gs À V t = 3 V. The values given in brackets refer to the gate lengths of the SB-MOSFETs.…”

Fully Depleted UTB and Trigate N-Channel MOSFETs Featuring Low-Temperature PtSi Schottky-Barrier Contacts With Dopant Segregation

“…Using NiSi with B/As dopants for DS, p-and n-channel devices in bulk [9], [10] and FinFETs [11] have been achieved. Similarly, with PtSi, C-V measurements on diode structures have shown that B DS decreases SBH to holes from 0.2 to 0.1 eV [12], [13].…”

Study of erbium disilicide and its application in Schottky source/drain silicon nanowire MOSFETs

“…From the existing reports on PtSi P-SSDMOS using SOl or bulk silicon as the starting substrate without barrier modification techniques [61,85], the Ion values range from 60JlA/Jlm to E. J. Tan 148 The In midgap (to the silicon bandgap) silicide scheme, silicides (including CoSi 2 and NiSi) having WbejJ close to 0.56eV (silicon bandgap energy/2) for both p and n-type silicon can be used [13,[65][66][67][68][69][70][71]78]. These silicides are used in conjunction with WbejJ modification techniques including (1) dopant segregation to the MS interface [13,[65][66][67][68][69][70][71],…”

“…(2) interfacial oxide at the MS interface [77], (3) sulphur passivation at the MS interface [66], (4) metal segregation to the MS interface [78], and (5) strain induced WbejJ lowering [70]. In the dopant segregation scheme, arsenic and antimony are usually used for N-E. J.…”