Noise tolerant dendritic lattice associative memories

Ritter, Gerhard X.; Schmalz, Mark S.; Hayden, Eric; Tucker, M. Catherine

doi:10.1117/12.896560

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“…We call M XX and W XX lattice autoassociative memories (LAAMs). The case of M XY and W XY , where Y is not the same as X, is called heteroassociative memories, and is discussed in [Rit11b]. Given this basic overview of LAMs, we next progress to the problem of analyzing the LNN formulation given in Equations (2) and (3).…”

Section: Background and Theorymentioning

confidence: 97%

“…These dendritic LAMs (or DLAMs) exhibit high noise tolerance, as shown in a companion paper [Rit11b]. We have further developed [Rit11b] pattern insertion and deletion operators that can update the LNN/LAM weight matrix to retain input patterns associated with high-performance classification results. We have found that this technique supports accurate classification by allowing the NNs so configured to adapt dynamically to input nonergodicities.…”

Section: Introductionmentioning

confidence: 97%

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Massively parallel computation of lattice associative memory classifiers on multicore processors

2011

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Over the past quarter century, concepts and theory derived from neural networks (NNs) have featured prominently in the literature of pattern recognition. Implementationally, classical NNs based on the linear inner product can present performance challenges due to the use of multiplication operations. In contrast, NNs having nonlinear kernels based on Lattice Associative Memories (LAM) theory tend to concentrate primarily on addition and maximum/minimum operations. More generally, the emergence of LAM-based NNs, with their superior information storage capacity, fast convergence and training due to relatively lower computational cost, as well as noise-tolerant classification has extended the capabilities of neural networks far beyond the limited applications potential of classical NNs.This paper explores theory and algorithmic approaches for the efficient computation of LAM-based neural networks, in particular lattice neural nets and dendritic lattice associative memories. Of particular interest are massively parallel architectures such as multicore CPUs and graphics processing units (GPUs). Originally developed for video gaming applications, GPUs hold the promise of high computational throughput without compromising numerical accuracy. Unfortunately, currently-available GPU architectures tend to have idiosyncratic memory hierarchies that can produce unacceptably high data movement latencies for relatively simple operations, unless careful design of theory and algorithms is employed. Advantageously, some GPUs (e.g., the Nvidia Fermi GPU) are optimized for efficient streaming computation (e.g., concurrent multiply and add operations). As a result, the linear or nonlinear inner product structures of NNs are inherently suited to multicore GPU computational capabilities. In this paper, the authors' recent research in lattice associative memories and their implementation on multicores is overviewed, with results that show utility for a wide variety of pattern classification applications using classical NNs or lattice-based NNs. Dataflow diagrams are presented in terms of a parameterized model of data burden and LAM partitioning.

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Section: Background and Theorymentioning

confidence: 97%

Section: Introductionmentioning

confidence: 97%