Non-parabolic band effects on the electrical properties of superlattice FETs

Maiorano, P.; Gnani, Elena; Grassi, Roberto; Gnudi, A.; Reggiani, Susanna; Baccarani, G.

doi:10.1109/ulis.2013.6523499

Cited by 5 publications

(4 citation statements)

References 7 publications

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“…Here, Qi is the total electron charge of the sub-band i located at the channel, the energy level of the sub-band i is Ei , and m|| * denotes as the in-plane effective mass of the channel material, which can be calculated from the following equation [39]:…”

Section: Model Description a Gate Capacitance Modelmentioning

confidence: 99%

Comprehensive Analysis of Quantum Mechanical Effects of Interface Trap and Border Trap Densities of High-k Al₂O₃/In_0.53Ga_0.47As on a 300-mm Si Substrate

Amir

Kim

2020

IEEE Access

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We investigated the effects of quantum confinement in determining the interface traps (Dit) and border traps (Nbt) of ALD deposited Al2O3 with temperature variations onto InxGa1-xAs on a 300mm Si (001) substrate. We also analysed the impact of these effects on the total gate capacitance of highk/Si and high-k/InxGa1-xAs structures using 1D Poisson-Schrodinger solver simulation tool (Nextnano). While quantum confinement has no or very little impact on the gate capacitance of high-k/Si structure, it has a considerably high amount of impact on the high-k/InxGa1-xAs structures and substantially lowers the total gate capacitance. To reflect the actual thickness between the insulator-semiconductor interface and charge centroid, capacitance-equivalent-thickness was used to reflect the effects of quantum confinement in the InxGa1-xAs layer. The Dit and Nbt values extracted using capacitance-equivalent-thickness were observed to be around 10% and 25%, respectively, higher than the values of extraction with equivalent-oxidethickness. INDEX TERMS Interface trap density, border trap density, quantum mechanical effect, high-k, III-V substrate.

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Section: Model Description a Gate Capacitance Modelmentioning

confidence: 99%

Comprehensive Analysis of Quantum Mechanical Effects of Interface Trap and Border Trap Densities of High-k Al₂O₃/In_0.53Ga_0.47As on a 300-mm Si Substrate

Amir

Kim

2020

IEEE Access

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“…Recently, a superlattice FET (SLFET) has been proposed because the tail of the thermal distribution can be eliminated by the superlattice. [5][6][7][8][9][10] In an SLFET, the filtering of the tail is carried out by the minigap in the conduction band. The SLFET is expected to supply an on-current higher than that supplied by a TFET because the current path has no band-toband tunneling.…”

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confidence: 99%

“…To study the feasibility of SLFETs, a suitable structure should be selected. In the proposed structure, [5][6][7] the superlattice is located in the neutral region of the source to keep the band structure flat even when the bottleneck between the source and the channel moves to induce current modulation. To realize this, two methods have been proposed.…”

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InGaAs/AlAs triple-barrier p–i–n junction diode for realizing superlattice-based FET for steep slope

Yukimachi

Miyamoto

2016

Jpn. J. Appl. Phys.

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The subthreshold slope of a conventional FET is over 60 mV/dec at room temperature. One of the proposed devices capable of overcoming this limitation is a superlattice FET (SLFET). In this study, we determined the feasibility of an SLFET experimentally. To overcome the limitations of conventional FETs, we proposed a “leaned” superlattice structure for an FET. With the help of calculations, we fabricated InGaAs/AlAs triple-barrier p–i–n diodes instead of FETs. By using measurements recorded at room and low temperatures, we confirmed the change in slope at the expected bias through calculations.

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Design and optimization of impurity- and electrostatically-doped superlattice FETs to meet all the ITRS power targets at VDD=0.4V

Maiorano¹,

Gnani²,

Gnudi³

et al. 2014

Solid-State Electronics

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Non-parabolic band effects on the electrical properties of superlattice FETs

Cited by 5 publications

References 7 publications

Comprehensive Analysis of Quantum Mechanical Effects of Interface Trap and Border Trap Densities of High-k Al₂O₃/In_0.53Ga_0.47As on a 300-mm Si Substrate

Comprehensive Analysis of Quantum Mechanical Effects of Interface Trap and Border Trap Densities of High-k Al₂O₃/In_0.53Ga_0.47As on a 300-mm Si Substrate

InGaAs/AlAs triple-barrier p–i–n junction diode for realizing superlattice-based FET for steep slope

Design and optimization of impurity- and electrostatically-doped superlattice FETs to meet all the ITRS power targets at VDD=0.4V

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Non-parabolic band effects on the electrical properties of superlattice FETs

Cited by 5 publications

References 7 publications

Comprehensive Analysis of Quantum Mechanical Effects of Interface Trap and Border Trap Densities of High-k Al2O3/In0.53Ga0.47As on a 300-mm Si Substrate

Comprehensive Analysis of Quantum Mechanical Effects of Interface Trap and Border Trap Densities of High-k Al2O3/In0.53Ga0.47As on a 300-mm Si Substrate

InGaAs/AlAs triple-barrier p–i–n junction diode for realizing superlattice-based FET for steep slope

Design and optimization of impurity- and electrostatically-doped superlattice FETs to meet all the ITRS power targets at VDD=0.4V

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Product

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Comprehensive Analysis of Quantum Mechanical Effects of Interface Trap and Border Trap Densities of High-k Al₂O₃/In_0.53Ga_0.47As on a 300-mm Si Substrate

Comprehensive Analysis of Quantum Mechanical Effects of Interface Trap and Border Trap Densities of High-k Al₂O₃/In_0.53Ga_0.47As on a 300-mm Si Substrate