Nonlinear Shaping SC Oscillator With Enhanced Linearity

Carrillo, Juan M.; Bahmani, F.; Sánchez-Sinencio, E.

doi:10.1109/jssc.2007.907167

Cited by 17 publications

(4 citation statements)

References 15 publications

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“…The requirement is replaced with a new ERROR-SEIR requirement on the constancy of the offset voltage added to the second signal. This requirement is easy to meet using simple signal generators [14].The effects of environmental nonstationarity can be mitigated using center symmetric interleaving pattern of the signals [15].The results suggest that the any low linearity monotonic signal with linearity around 7-bits can be used to test the INL of 14-bit ADCS with an accuracy of more than 14-bits.This would allow simple signal generators suggested in [12] and [13] to accurately test the INL of 14-bit ADCs.…”

Section: Results Discussionmentioning

confidence: 99%

ADC integral non-linearity testing with low linearity monotonic signals

Vasan

Chen

Geiger

2011

2011 IEEE International Instrumentation and Measurement Technology Conference

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Methods to test the Integral Non-Linearity (INL) ofAnalog-to-Digital Converters (ADCs) using any monotonic signal with low linearity are proposed. Two methods that estimate the INL of the ADC by removing the error due to non-linearity in the stimulus are described. Signals with linearity dramatically lesser than the ADC under test, can be used to accurately estimate the INL of the ADC. Simulation results show that the maximum INL estimation error for testing 14-bit ADCs using 36 dB pure sinusoids and 7-bit linear exponential signals is under 0.6 LSB. Keywords -Integral non-linearity (INL), differential nonlinearity (DNL), stimulus error identification and removal (SEIR), stimulus error removal (SER)

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Section: Results Discussionmentioning

confidence: 99%

ADC integral non-linearity testing with low linearity monotonic signals

Vasan

Chen

Geiger

2011

2011 IEEE International Instrumentation and Measurement Technology Conference

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“…The resolution of the sinusoidal typically needs to be at least two bits higher than the effective resolution of the ADC, which poses a great design challenge for BIST implementation. A classical approach for generating on-chip an analog sinusoidal is to employ a closed-loop oscillator that involves a highly selective bandpass filter and a comparator [163,164], as shown in Fig. 12.…”

Section: Data Converters Dft and Bistmentioning

confidence: 99%

Analog and Mixed-Signal Test

Stratigopoulos¹,

Kaminska²

2017

Electronic Design Automation for IC System Design, Verification, and Testing

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“…1: closed-loop generators, which consists of a filtering section with a nonlinear feedback mechanism [1,4,12], and open-loop generators, which are based on a digital pattern generator followed by a D/A conversion and a filtering stage [2,5,14].…”

Section: Previous Workmentioning

confidence: 99%

On-chip sinusoidal signal generation with harmonic cancelation for analog and mixed-signal BIST applications

Barragán

Léger

Vazquez

et al. 2014

Analog Integr Circ Sig Process

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This work presents a technique for the onchip generation of analog sinusoidal signals with high spectral quality and reduced circuitry resources. The proposed generation technique consists of a modified low-order analog filter, that provides a sinusoidal output as response to a DC input, combined with a harmonic cancellation strategy to improve the linearity of the generated signal. The proposed generator has the attributes of digital programming and control, low area overhead, and low design effort, which make this approach very suitable as test stimulus generator for builtin test applications. An integrated prototype designed in a 180nm CMOS technology is presented in order to show the feasibility of the technique. Results obtained from the prototype show a THD around −80dB.

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Nonlinear Shaping SC Oscillator With Enhanced Linearity

Cited by 17 publications

References 15 publications

ADC integral non-linearity testing with low linearity monotonic signals

ADC integral non-linearity testing with low linearity monotonic signals

Analog and Mixed-Signal Test

On-chip sinusoidal signal generation with harmonic cancelation for analog and mixed-signal BIST applications

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