Novel Basic Block of Multilevel Inverter Using Reduced Number of On-State Switches and Cascaded Circuit Topology

Prayag, Aparna; Bodkhe, Sanjay

doi:10.1155/2017/5640926

Cited by 15 publications

(6 citation statements)

References 24 publications

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“…The common advantage of asymmetric topology is that it is able to generate a high level of output voltage by using the same structure of symmetric topology [15,16]; as an example, asymmetric topology with different DC voltages, i.e., Vdc1 = Vdc, Vdc2 = 2Vdc, Vdc3 = 4Vdc, Vdc4 = 8Vdc as compared to the DC source voltage of symmetric topology, i.e., Vdc1=Vdc2=Vdc3. Asymmetric topology has different values of DC source voltage and the modulation technique is complex and the level can be upgraded up to two levels higher.…”

Section: Voltage Thd Minimization By Mpwm-lft and Asymmetric Topology With Rnsd Circuit Structure 21 Principle Of Asymmetric Topologymentioning

confidence: 99%

Multilevel inverter with MPWM-LFT switching strategy for voltage THD minimization

Yatim¹,

Ponniran²,

Kasiran³

2019

IJPEDS

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<span>This paper presents a proposed modified pulse width modulation – low frequency triangular (MPWM-LFT) switching strategy for minimization of voltage THD with implementation of asymmetric multilevel inverter (AMLI) topology on the reduced number of switching devices (RNSD) circuit structure. Principally, MPWM-LFT able to produce optimum angle of the output voltage level in order to minimize total harmonic distortion (THD). In this study, 5-level reduced number of switching devices circuit structure is selected as a circuit configuration for asymmetric (7-level structure) multilevel inverter. For switching strategy, MPWM used low switching frequency in producing signal and needs higher output voltage levels to achieve low total harmonic distortion. In contrast, sinusoidal pulse width modulation used high switching frequency in order to minimize total harmonic distortion. By optimizing angle at the output voltage using MPWM-LFT switching strategy, the voltage THD is lower as compared to MPWM and SPWM switching strategies. MPWM-LFT switching strategy obtains 11.6% of voltage THD for the 7-level asymmetric topology as compared to MPWM and SPWM switching strategies with the voltage THD are 21.5% and 17.5% respectively from the experimental works.</span>

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Section: Voltage Thd Minimization By Mpwm-lft and Asymmetric Topology With Rnsd Circuit Structure 21 Principle Of Asymmetric Topologymentioning

confidence: 99%

Multilevel inverter with MPWM-LFT switching strategy for voltage THD minimization

Yatim¹,

Ponniran²,

Kasiran³

2019

IJPEDS

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“…One of the leading advances for MLIs is the improvement in power electronics which have been used to fulfill the requirements for many applications for low/medium voltage electrical utility [4]. MLI is a good solution for improving the performance of many industrial applications such as renewable energy systems [5], motor drives [6], uninterruptable power supplies (UPS), flexible AC transmission systems (FACTS) [7], etc.…”

Section: Introductionmentioning

confidence: 99%

Design and Implementation of a New Multilevel Inverter Employing Reduced Components

Feloups¹,

Mohamed²

2019

OALib

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This paper focuses on an implementation of new topology which can synthesize multi-level output voltage at the load terminals. The proposed inverter consists of two main parts; level generation part and polarity generation part. Level generation part is responsible for generating voltage levels at its end while; polarity generation part is a traditional H-bridge which is used to provide inversion of the output voltage levels. Single-phase seven-level inverter has been presented from the proposed multilevel inverter. This topology offers reduced number of switching components compared with many recent available topologies particularly for high number of levels. Due to the multi-level output voltage, low total harmonic distortion (THD), less circuit complexity, less cost and high efficiency can be obtained. A conventional PI controller is used for load voltage regulation to obtain output voltage near to sinusoidal. Computer-aided using the dSPACE_CP1103 controller and experimental setup are carried out to provide the validity and effectiveness of the proposed inverter.

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“…Flying capacitor type is not widely used because of the presence of high number of capacitors, meanwhile, diode clamped type is high cost of implementation compared to flying capacitor and cascaded H-bridge types [6]. Cascaded H-bridge multilevel inverter is simpler than diode clamped and flying capacitor types due to several advantages such as automatic voltage sharing, low switching stresses, low switching redundancy and requirement of least number of components, lower voltage of capacitors and diodes [7]. In Cascaded Hbridge multilevel inverter, only three output voltage levels can be produced.…”

Section: Introductionmentioning

confidence: 99%

Symmetrical and Asymmetrical Multilevel Inverter Structures with Reduced Number of Switching Devices

Yatim

Ponniran

Zaini

et al. 2018

IJEECS

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The purpose of this study is to analyze the operation and design of symmetrical and asymmetrical multilevel inverter structures with reduced number of switching devices. In this study, the term of conventional inverter is defined as a single cascaded inverter. Specifically, the inverter operates in three complete loops and only produces 2-level and 3-level of output voltages. Usually, cascaded structure suffers from the high total harmonic distortion. Thus, by considering multilevel structure of inverter, low total harmonic distortion reduction and voltage stress reduction on switching devices can be archived. Sinusoidal pulse width modulation and modified square pulse width modulation are used as modulation techniques in switching schemes of the designed multilevel inverters. The findings indicate that, the designed multilevel structure cause low total harmonics distortion at the output voltage. Furthermore, the asymmetrical structure is producing the same output voltage levels with reduced number of switching devices compared to the symmetrical structure is experimentally confirmed. The findings show that the total harmonic distortion for 7-level (symmetrical) and 9-level (asymmetrical) are 16.45% and 15.22%, respectively.

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Novel Basic Block of Multilevel Inverter Using Reduced Number of On-State Switches and Cascaded Circuit Topology

Cited by 15 publications

References 24 publications

Multilevel inverter with MPWM-LFT switching strategy for voltage THD minimization

Multilevel inverter with MPWM-LFT switching strategy for voltage THD minimization

Design and Implementation of a New Multilevel Inverter Employing Reduced Components

Symmetrical and Asymmetrical Multilevel Inverter Structures with Reduced Number of Switching Devices

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