2019
DOI: 10.1049/iet-cds.2018.5036
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Novel CNFET ternary circuit techniques for high‐performance and energy‐efficient design

Abstract: Here, the authors propose a new family of ternary circuits for a general design perspective. Besides presenting an efficient ternary logical circuit approaches, the focus of this study is also about introducing techniques for reducing the performance metric cost of the proposed family. Basic ternary arithmetic gates, ternary half-adder, and ternary partial product generator are also proposed for two different levels. First, direct transistor level implementation is considered, next a modification in the gate l… Show more

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Cited by 38 publications
(43 citation statements)
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“…In this situation, the pull-up network and the rightmost NFET transistors of the pull-down network go ON, and the result would be equal to "V dd /2" at the carry output node. The method for voltage dividing to produce "V dd /2" at the output is more detailed in [21]. The transient responses of the proposed exact multiplier are shown in Figure 4, which confirms its correct operation.…”
Section: The Proposed Exact Designmentioning
confidence: 58%
“…In this situation, the pull-up network and the rightmost NFET transistors of the pull-down network go ON, and the result would be equal to "V dd /2" at the carry output node. The method for voltage dividing to produce "V dd /2" at the output is more detailed in [21]. The transient responses of the proposed exact multiplier are shown in Figure 4, which confirms its correct operation.…”
Section: The Proposed Exact Designmentioning
confidence: 58%
“…Different transistor technologies have been used such as CMOS [11], FinFet [12], and CNFET [13]- [18]. Among the mentioned techniques, CNFET provides the best trade-off in terms of energy efficiency and circuit speed [19].…”
Section: Introductionmentioning
confidence: 99%
“…Therefore, this paper uses CNFET technology in the design of the ternary circuits. The proposed designs will compare to the latest CNFET-based designs in [13]- [18], which are known to provide efficient circuit designs in terms of transistor count, power and PDP. In particular, [13] presents the STI , TNAND, TNOR, TDecoder, THA, and TMUL using CNFET.…”
Section: Introductionmentioning
confidence: 99%
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“…In carbon nanotube field‐effect transistors (CNTFETs), the threshold voltage can be altered by changing the tube diameter [11, 12]. Using multi‐threshold CNTFETs, the ternary logic gates are designed in [13].…”
Section: Introductionmentioning
confidence: 99%