Novel high-voltage LDMOS with linear graded drift region width

Abstract

In this paper, a novel Lateral Diffused Metal Oxide Semiconductor (LDMOS) with linear graded drift region width is proposed. The device features a specific drift region with the lateral width increasing from source to drain, which modulates the electric field distribution and increases the doping concentration. The breakdown voltage exceeds 600V on the proposed LDMOS with 1 m SOI layer, 3 m buried oxide and 60 m drift region length. The characteristics are investigated by a three dimensional simulator. The simulation results show that a 135% increase in breakdown voltage and 5 times increase in figure of merits are achieved for the proposed device when compared with those of the conventional device.

The Drift Region Width Modulation Technique for Breakdown Performance Enhancement of AlGaN/GaN HEMT

“…However, the modulation of the electric field distribution in the whole drift region that between the gate and drain electrodes is still missing, leaving a vast space for devices' BV improvement. Based on the charge-induced electric field modulation effect, the Variation Lateral Width (VLW) technique was firstly employed on Si-based power devices in 2015 [13], [14]. Same as other junction terminal techniques applied to Si-based power devices, these mature methodologies are unable to be transferred directly to the GaN-based power devices as a result of different structures and mechanisms.…”