Novel planarization and passivation in the integration of III-V semiconductor devices

IEEE Trans. Semicond. Manufact.

Zheng

Sabnis³

et al. 2005

Abstract-This paper reports an easy planarization and passivation approach for the integration of III-V semiconductor devices. Vertically etched III-V semiconductor devices typically require sidewall passivation to suppress leakage currents and planarization of the passivation material for metal interconnection and device integration. It is, however, challenging to planarize all devices at once. This technique offers wafer-scale passivation and planarization that is automatically leveled to the device top in the 1-3-m vicinity surrounding each device. In this method, a dielectric hard mask is used to define the device area. An undercut structure is intentionally created below the hard mask, which is retained during the subsequent polymer spinning and anisotropic polymer etch back. The spin-on polymer that fills in the undercut seals the sidewalls for all the devices across the wafer. After the polymer etch back, the dielectric mask is removed leaving the polymer surrounding each device level with its device top to atomic scale flatness. This integration method is robust and is insensitive to spin-on polymer thickness, polymer etch nonuniformity, and device height difference. It prevents the polymer under the hard mask from etchinduced damage and creates a polymer-free device surface for metallization upon removal of the dielectric mask. We applied this integration technique in fabricating an InP-based photonic switch that consists of a mesa photodiode and a quantum-well waveguide modulator using benzocyclobutene (BCB) polymer. We demonstrated functional integrated photonic switches with high process yield of 90%, high breakdown voltage of 25 V, and low ohmic contact resistance of 10 . To the best of our knowledge, such an integration of a surface-normal photodiode and a lumped electroabsorption modulator with the use of BCB is the first to be implemented on a single substrate.

Section: Our New Method: Self-aligning Hard Mask Assisted Planarmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Self-Aligning Planarization and Passivation for Integration Applications in III–V Semiconductor Devices

IEEE Trans. Semicond. Manufact.

Zheng

Sabnis³

et al. 2005

“…In general, for any PD and EAM wavelengths within the C-band this switch is capable of high-performance wavelength conversion, data broadcasting, partial optical regeneration, and space switching when operating within a 2-D array of switches. Detailed discussions of the device design and functionality, as well as demonstrations of high-speed operation, can be found elsewhere [5]- [9], [14], [16]- [18].…”

Section: Integration Validation: Proof-of-concept Demonstrationmentioning

confidence: 99%

“…We report a multigrowth monolithic integration technique [7] that incorporates a special etch sequence and self-planarization and passivation [8], [9] steps to enable chip-scale photonic circuit integration. To the best of our knowledge, few other groups have recently attempted to integrate surface-illuminated and waveguide-coupled optoelectronic devices monolithically on a single chip [10]- [13].…”

mentioning

confidence: 99%

Intimate monolithic integration of chip-scale photonic circuits

Sabnis

IEEE J. Select. Topics Quantum Electron.

Fidaner

et al. 2005

Abstract-In this paper, we introduce a robust monolithic integration technique for fabricating photonic integrated circuits comprising optoelectronic devices (e.g., surface-illuminated photodetectors, waveguide quantum-well modulators, etc.) that are made of completely separate epitaxial structures and possibly reside at different locations across the wafer as necessary. Our technique is based on the combination of multiple crystal growth steps, judicious placement of epitaxial etch-stop layers, a carefully designed etch sequence, and self-planarization and passivation steps to compactly integrate optoelectronic devices. This multigrowth integration technique is broadly applicable to most III-V materials and can be exploited to fabricate sophisticated, highly integrated, multifunctional photonic integrated circuits on a single substrate. As a successful demonstration of this technique, we describe integrated photonic switches that consume only a 300 × 300 µm footprint and incorporate InGaAs photodetector mesas and InGaAsP/InP quantum-well modulator waveguides separated by 50 µm on an InP substrate. These switches perform electrically-reconfigurable optically-controlled wavelength conversion at multi-Gb/s data rates over the entire center telecommunication wavelength band.

“…The overall thickness of the PD structure is chosen such that the uppermost layers of the EAM and the PD are approximately level, enabling metallization to interconnect the -contacts of the two devices. Nonplanarity across the wafer, however, can be accommodated using our new self-aligned planarization and passivation technique [25], [26]. The benzocyclobutene (BCB) polymer fills in the space between the PD mesa and the waveguide EAM such that the polymer surrounding each device is level with its device top within atomic scale flatness.…”

Section: Realization Of the Switchmentioning

confidence: 99%

Multifunctional integrated photonic switches

IEEE J. Select. Topics Quantum Electron.

Sabnis²,

Fidaner³

et al. 2005

Abstract-Traditional optical-electronic-optical (o-e-o) conversion in today's optical networks requires cascading separately packaged electronic and optoelectronic chips and propagating high-speed electrical signals through and between these discrete modules. This increases the packaging and component costs, size, power consumption, and heat dissipation. As a remedy, we introduce a novel, chip-scale photonic switching architecture that operates by confining high-speed electrical signals in a compact optoelectronic chip and provides multiple network functions on such a single chip. This new technology features low optical and electrical power consumption, small installation space, high-speed operation, two-dimensional scalability, and remote electrical configurability.In this paper, we present both theoretical and experimental discussion of our monolithically integrated photonic switches that incorporate quantum-well waveguide modulators directly driven by on-chip surface-illuminated photodetectors. These switches can be conveniently arrayed two-dimensionally on a single chip to realize a number of network functions. Of those, we have experimentally demonstrated arbitrary wavelength conversion across 45 nm and dual-wavelength broadcasting over 20 nm, both spanning the telecommunication center band (1530-1565 nm) at switching speeds up to 2.5 Gb/s. Our theoretical calculations predict the capability of achieving optical switching at rates in excess of 10 Gb/s using milliwatt-level optical and electrical switching powers.