Novel test structures for temperature budget determination during wafer processing

Abstract

No preference for poster or oral presentation Some process steps during wafer processing demand a carefully applied temperature budget. Novel test structures are presented for monitoring and determining this thermal budget during processing (such as sputtering or etching). Our system is based on well-defined silicidation reactions, simple to read out and enables an easy integration into existing lay-outs.

Gap-closing test structures for temperature budget determination

“…By changing the device lay-out, i.e. gap-based structures vs. continuous line structures the maximum detectable temperature can be increased from 200 °C for devices on Si substrates [6] to approximately 350 °C. This enhances the practicability of these devices since lay-outs using just one single metal now can cover a large temperature window.…”

“…The measured resistance is a direct measure of the stage of the silicidation reaction, and thus of the experienced thermal budget, as proposed previously [6]. In this work, we use similar structures and 4-point probe measurements.…”

“…In previous publications [5,6] we demonstrated the use of Pd in thermal sensor design. The reaction of Pd with Si, forming Pd 2 Si behaves according to mathematically well-described kinetics [5,7].…”

“…The reaction of Pd with Si, forming Pd 2 Si behaves according to mathematically well-described kinetics [5,7]. In last year's paper at this conference, demonstrations were given for sensors on bulk-silicon substrates [6].…”

Novel Test Structures for Dedicated Temperature Budget Determination

“…The first system consists of continuous Pd lines patterned on Si substrates. Part of this work was also presented at the ICMTS 2010 [5]. The second system consists of not yet published results of Pdpatterned gap-based structures on thin (∼70 nm) polysilicon layers on oxidized silicon substrates.…”