2010 International Conference on Field Programmable Logic and Applications 2010
DOI: 10.1109/fpl.2010.61
|View full text |Cite
|
Sign up to set email alerts
|

On Identifying Segments of Traces for Dynamic Compilation

Abstract: Typical computing systems based on general purpose processors (GPPs) are extended with coarse-grained reconfigurable arrays (CGRAs) to provide higher performance and/or energy savings. In order for applications to take advantage of these computing systems, efficient dynamic mapping techniques are required. Those dynamic mapping techniques will be responsible for automatically moving computations originally running in the GPP to the CGRA. The concept of dynamic compilation, widespread in the context of JIT comp… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
3
2

Citation Types

0
13
0

Year Published

2010
2010
2017
2017

Publication Types

Select...
3
2

Relationship

3
2

Authors

Journals

citations
Cited by 7 publications
(13 citation statements)
references
References 9 publications
0
13
0
Order By: Relevance
“…One particular research topic has been the use of reconfigurable fabrics (e.g., FPGAs) to accelerate execution of general purpose applications in embedded scenarios [12], [13]. Some approaches include the Warp Processor [14], [15], the AMBER architecture [16], [17], the Configurable Compute Array (CCA) [18], [19], the DIM Reconfigurable System [20], [21], and the Megablock approach [4], [22].…”
Section: Related Workmentioning
confidence: 99%
See 1 more Smart Citation
“…One particular research topic has been the use of reconfigurable fabrics (e.g., FPGAs) to accelerate execution of general purpose applications in embedded scenarios [12], [13]. Some approaches include the Warp Processor [14], [15], the AMBER architecture [16], [17], the Configurable Compute Array (CCA) [18], [19], the DIM Reconfigurable System [20], [21], and the Megablock approach [4], [22].…”
Section: Related Workmentioning
confidence: 99%
“…Bispo and Cardoso [4], [22] propose the mapping of repetitive trace-based patterns of instructions, named Megablocks, in the context of dynamically moving instructions executing on a CPU to reconfigurable arrays. The objective of the Megablock is to address several difficulties related to mapping loops of sequential code to hardware, such as determination of the number of loop iterations, and the handling of jumps and branches in sequential code.…”
Section: Related Workmentioning
confidence: 99%
“…The Megablock [6] was proposed in the context of dynamically moving large instruction sequences executing in a GPP to a coprocessor. The Megablock [6], represents repetitive patterns of instructions in the execution trace of a program.…”
Section: Detecting Megablocksmentioning
confidence: 99%
“…The Megablock [6], represents repetitive patterns of instructions in the execution trace of a program. Each Megablock represents a single, common path of a loop, which can cross several Basic Blocks.…”
Section: Detecting Megablocksmentioning
confidence: 99%
See 1 more Smart Citation