On line self recovery of embedded multi-processor SOC on FPGA using dynamic partial reconfiguration

Abstract

Abstract. An error-recovery method for embedded multi-processor systems on SRAM-based FPGAs is proposed. This method is effective against soft-errors in the configuration memory, such as the errors caused by hIgh energy radiation also known as Single Event Upsets. The error-recovery algorithm performs on-line test of the ~PGA configuration memory and recovers errors using dynamic partial reconfiguration. Processor cores perform a dIstributed recovery procedure. If a failure occurs in the processor currently runOing the recovery algOrithm, another processor core takes the role and performs reconfiguration. Presented case study demonstrates the advantage of the proposed approach.

Tracing Fault Effects in FPGA Systems

“…Typically, SEU error rate is specified in FIT units (the number of failures that can occur in 10 9 hours) referred to the memory size in bits. In [3], [4], [20] we have quite interesting results related to radiation at the level of the earth. They cover not only susceptibility of configuration memory to SEUs but also data RAMs incorporated in logical units (block RAM memory).…”

“…Knowing the space radiation energies and intensity on the earth or satellite orbits (for different places and altitudes) we can recalculate the operation time in the experiment (with the accelerator) to the equivalent time in the considered FPGA operation target environment, e.g. [3]. 3) Fault emulation in FPGAs.…”

“…JTAG) to the tested chip and monitoring its behavior. Here, some supporting equipment is needed (compare [3], [8], [18]). This can be extended for flip-flops and block RAMs in more sophisticated fault injectors.…”

“…Hence, various fault tolerance schemes are proposed in the literature, e.g. partial reconfiguration, massive redundancy, error scrubbing [1]- [3]. As opposed to classical systems based on ASICs and microprocessors (with fixed logical structure) in FPGAs we face some additional problems related to configuration faults which have severe impact on the system operation.…”

“…This is quite typical model of using FPGAs in many systems (e.g. [3], [8], [9]), however in practice we can use more sophisticated microprocessors e.g. Power PC [8] (for many of them configuration files for FPGAs are available).…”