On the Deposition Kinetics of the LPCVD Gate Oxides Prepared from SiH₄ and O₂

Abstract

An experimental study on the deposition kinetics of LPCVD SiOz films at 450°C in a hot wall system from Si& and O2 in the range of very high O2 1 SiH4 ratios (100-284) and very low Si& partial pressures (3.5-5.2 pbar) is presented. Unexpectedly, a low deposition rate of 1.8 nmlmin with a thickness uniformity of less than 6 MAXMIN% on five simultaneously processed wafers is obtained. The results can be explained by a gas phase formation of precursors which dominate the deposition process. This process can be used for different device applications where thin S i 0 2 films are required, such as Thin Film Transistors and EEPROMs.

Deposited inter-polysilicon dielectrics for nonvolatile memories

“…In the last decade deposited dielectric layers have been investigated as a very promising alternative, since these dielectric layers are deposited on the polysilicon layer without silicon surface consumption, contrary to thermal oxidation. low-temperature oxides (LTO) [33] deposited in a rapid thermal processing (RTP) system [34] or in a conventional low pressure chemical vapor deposition (LPCVD) system [35] have resulted in useful layers for thin film transistors [36]. Although post deposition treatments have been applied (see for instance [37]- [45]), the electrical properties are too poor for EEPROM application.…”

Dielectric breakdown II: Related projects at the University of twente

“…This includes LPCVD [6] and rapid thermal processing chemical vapour deposition (RTCVD) [7] methods. Preliminar¢ results show that the LPCVD oxide can be obtained at a low deposition rate, necessary for reproducible growth of thin layers, with a reasonable thickness uniformity across the wafers.…”