2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems 2011
DOI: 10.1109/dft.2011.52
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On the Feasibility of Built-In Self Repair for Logic Circuits

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Cited by 13 publications
(1 citation statement)
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“…Only a diagnostic test of suitable resolution can clearly identify such faults as the first step of a repair procedure. Also therefore, built-in self repair by reconfiguration is typically a relative slow process, which needs time-slots in the area of milliseconds at best [10,11]. It can favorably be organized at start-up.…”
Section: Introductionmentioning
confidence: 98%
“…Only a diagnostic test of suitable resolution can clearly identify such faults as the first step of a repair procedure. Also therefore, built-in self repair by reconfiguration is typically a relative slow process, which needs time-slots in the area of milliseconds at best [10,11]. It can favorably be organized at start-up.…”
Section: Introductionmentioning
confidence: 98%