On the origin of the premature breakdown of thermal oxide on 3C-SiC probed by electrical scanning probe microscopy

Fiorenza, Patrick; Schilirò, Emanuela; Giannazzo, Filippo; Bongiorno, Corrado; Zieliński, Marcin; Via, Francesco La; Roccaforte, Fabrizio

doi:10.1016/j.apsusc.2020.146656

Cited by 10 publications

(9 citation statements)

References 36 publications

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“…Both samples provide C-V curves negatively shifted compared to the ideal value VFB = +0.9 V. In particular, the experimental flat band voltage values were −0.6 V and −3 V for the T-ALD and PE-ALD stacks, respectively. However, as can be observed in Figure 2c, such negative shifts were smaller compared to that of MOS capacitor where the insulator was only a thick (40 nm) thermal SiO2 [37]. This experimental finding is related to the higher dielectric constant of the Al2O3 (κ = 8) with respect to that Lateral MOS capacitors schematically depicted in Figure 2a were fabricated using photolithography, metal deposition and lift-off processes.…”

Section: Discussionmentioning

confidence: 80%

“…The MOS structures fabricated on T-Al 2 O 3 /SiO 2 /3C-SiC and PE-Al 2 O 3 /SiO 2 /3C-SiC were probed by C-V measurements, which are shown in Figure 2 c. Both samples provide C-V curves negatively shifted compared to the ideal value V FB = +0.9 V. In particular, the experimental flat band voltage values were −0.6 V and −3 V for the T-ALD and PE-ALD stacks, respectively. However, as can be observed in Figure 2 c, such negative shifts were smaller compared to that of MOS capacitor where the insulator was only a thick (40 nm) thermal SiO 2 [ 37 ]. This experimental finding is related to the higher dielectric constant of the Al 2 O 3 (κ = 8) with respect to that of SiO 2 (κ = 3.9).…”

Section: Discussionmentioning

confidence: 98%

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Al2O3 Layers Grown by Atomic Layer Deposition as Gate Insulator in 3C-SiC MOS Devices

Schilirò,

Fiorenza,

Lo Nigro

et al. 2023

Materials

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Metal-oxide-semiconductor (MOS) capacitors with Al2O3 as a gate insulator are fabricated on cubic silicon carbide (3C-SiC). Al2O3 is deposited both by thermal and plasma-enhanced Atomic Layer Deposition (ALD) on a thermally grown 5 nm SiO2 interlayer to improve the ALD nucleation and guarantee a better band offset with the SiC. The deposited Al2O3/SiO2 stacks show lower negative shifts of the flat band voltage VFB (in the range of about −3 V) compared with the conventional single SiO2 layer (in the range of −9 V). This lower negative shift is due to the combined effect of the Al2O3 higher permittivity (ε = 8) and to the reduced amount of carbon defects generated during the short thermal oxidation process for the thin SiO2. Moreover, the comparison between thermal and plasma-enhanced ALD suggests that this latter approach produces Al2O3 layers possessing better insulating behavior in terms of distribution of the leakage current breakdown. In fact, despite both possessing a breakdown voltage of 26 V, the T-ALD Al2O3 sample is characterised by a higher current density starting from 15 V. This can be attributable to the slightly inferior quality (in terms of density and defects) of Al2O3 obtained by the thermal approach and, which also explains its non-uniform dC/dV distribution arising by SCM maps.

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Section: Discussionmentioning

confidence: 80%

Section: Discussionmentioning

confidence: 98%

Al2O3 Layers Grown by Atomic Layer Deposition as Gate Insulator in 3C-SiC MOS Devices

Schilirò,

Fiorenza,

Lo Nigro

et al. 2023

Materials

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“…[25] In general, gate J g with a sudden jump exceeding 3 orders can be regarded as hard breakdown. [26] The soft breakdown part is the area where the J g increases obviously without hard breakdown, and the electric field of gate oxide (E ox ) from 6 MV/cm to the intrinsic breakdown field (E int ) is the soft breakdown part. The gate oxide is tested by TDDB with constant stress electric field (E str ) which is determined by TZDB test.…”

Section: Resultsmentioning

confidence: 99%

Impact of O₂ post oxidation annealing on the reliability of SiC/SiO₂ MOS capacitors*

Liu¹,

Hao²,

Wang³

et al. 2021

Chinese Phys. B

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The effects of dry O2 post oxidation annealing (POA) at different temperatures on SiC/SiO2 stacks are comparatively studied in this paper. The results show interface trap density (D it) of SiC/SiO2 stacks, leakage current density (J g), and time-dependent dielectric breakdown (TDDB) characteristics of the oxide, are affected by POA temperature and are closely correlated. Specifically, D it, J g, and inverse median lifetime of TDDB have the same trend against POA temperature, which is instructive for SiC/SiO2 interface quality improvement. Moreover, area dependence of TDDB characteristics for gate oxide on SiC shows different electrode areas lead to same slope of TDDB Weibull curves.

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“…Besides the application on Schottky contacts described in Section 3.1 , nanoscale resolution current mapping by C-AFM can also be a powerful analysis technique for investigation of the dielectric breakdown behaviour of thin insulators. In fact, this method was recently employed by Fiorenza et al [ 79 ] in order to explain the reasons behind the premature breakdown of thermal oxide (SiO 2 ) grown on 3C-SiC typically observed in MOS capacitors, by stressing the oxide through the application of a bias to the C-AFM tip corresponding to an electric field of 8 MV/cm (see schematic set-up in Figure 10 a).…”

Section: Processing Technology For 3c-sicmentioning

confidence: 99%

Status and Prospects of Cubic Silicon Carbide Power Electronics Device Technology

Li¹,

Roccaforte

Greco

et al. 2021

Materials

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Wide bandgap (WBG) semiconductors are becoming more widely accepted for use in power electronics due to their superior electrical energy efficiencies and improved power densities. Although WBG cubic silicon carbide (3C-SiC) displays a modest bandgap compared to its commercial counterparts (4H-silicon carbide and gallium nitride), this material has excellent attributes as the WBG semiconductor of choice for low-resistance, reliable diode and MOS devices. At present the material remains firmly in the research domain due to numerous technological impediments that hamper its widespread adoption. The most obvious obstacle is defect-free 3C-SiC; presently, 3C-SiC bulk and heteroepitaxial (on-silicon) display high defect densities such as stacking faults and antiphase boundaries. Moreover, heteroepitaxy 3C-SiC-on-silicon means low temperature processing budgets are imposed upon the system (max. temperature limited to ~1400 °C) limiting selective doping realisation. This paper will give a brief overview of some of the scientific aspects associated with 3C-SiC processing technology in addition to focussing on the latest state of the art results. A particular focus will be placed upon key process steps such as Schottky and ohmic contacts, ion implantation and MOS processing including reliability. Finally, the paper will discuss some device prototypes (diodes and MOSFET) and draw conclusions around the prospects for 3C-SiC devices based upon the processing technology presented.

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On the origin of the premature breakdown of thermal oxide on 3C-SiC probed by electrical scanning probe microscopy

Cited by 10 publications

References 36 publications

Al2O3 Layers Grown by Atomic Layer Deposition as Gate Insulator in 3C-SiC MOS Devices

Al2O3 Layers Grown by Atomic Layer Deposition as Gate Insulator in 3C-SiC MOS Devices

Impact of O₂ post oxidation annealing on the reliability of SiC/SiO₂ MOS capacitors*

Status and Prospects of Cubic Silicon Carbide Power Electronics Device Technology

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On the origin of the premature breakdown of thermal oxide on 3C-SiC probed by electrical scanning probe microscopy

Cited by 10 publications

References 36 publications

Al2O3 Layers Grown by Atomic Layer Deposition as Gate Insulator in 3C-SiC MOS Devices

Al2O3 Layers Grown by Atomic Layer Deposition as Gate Insulator in 3C-SiC MOS Devices

Impact of O2 post oxidation annealing on the reliability of SiC/SiO2 MOS capacitors*

Status and Prospects of Cubic Silicon Carbide Power Electronics Device Technology

Contact Info

Product

Resources

About

Impact of O₂ post oxidation annealing on the reliability of SiC/SiO₂ MOS capacitors*