On the testability of IEEE 1687 networks

Cantoro, Riccardo; Montazeri, Mehrdad; Reorda, M. Sonza; Zadegan, Farrokh Ghani; Larsson, Erik

doi:10.1109/ats.2015.7447934

Cited by 27 publications

(37 citation statements)

References 10 publications

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“…At the same time, the new algorithm is almost always faster than its predecessor. Experimental results on a set of benchmarks [15] demonstrate that the approach is able to generate test sequences orders of magnitude shorter than those reported in [14], [11] and [13], while always keeping the computational cost under control.…”

Section: Introductionmentioning

confidence: 94%

“…In [11] we proposed a general approach to automatically generate a test sequence for an IEEE 1687 network with respect to permanent faults. For each type of programmable module we first introduced a high-level fault model, and then provided techniques for their test, and finally described how to combine them into a single comprehensive test.…”

Section: Introductionmentioning

confidence: 99%

“…Test generation can start directly from the network structure (as described by the ICL file mandated by the IEEE 1687 standard). The test generation algorithms proposed in [11] are based on heuristics that can easily run even on relatively large RSNs.…”

Section: Introductionmentioning

confidence: 99%

“…In [13] we proposed a new method facing this problem, based on evolutionary computation. Its main advantage lies in its ability to always produce a solution, no matter the RSN complexity, while the quality of the produced result (i.e., the duration of the resulting test) is never too far from the optimum, when the latter can be computed, and it is often lower than the one produced by the method described in [11]. In [14] we first modeled the RSN as a Finite State Automaton (FSA), and then we proposed a semi-formal method able to deal with larger and more complex circuits producing a test sequence able to detect any permanent fault affecting the reconfigurable modules, but whose duration is lower than the one of the test sequences previously generated by the heuristic solutions.…”

Section: Introductionmentioning

confidence: 99%

“…In this Section we will first briefly overview the key characteristics of an IEEE 1687 network, then explain how their test can be performed according to the approach first introduced in [11], and finally summarize why minimizing the test duration may turn into a computationally complex task.…”

Section: Introductionmentioning

confidence: 99%

See 4 more Smart Citations

A New Technique to Generate Test Sequences for Reconfigurable Scan Networks

Cantoro

Damljanovic

Reorda

et al. 2018

2018 IEEE International Test Conference (ITC)

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Nowadays, industries require reliable methods for accessing the instrumentations embedded within semiconductor devices. The situation led to the definition of standards, such as the IEEE 1687, for designing the required infrastructures, and the proposal of techniques to test them. So far, most of the test-generation approaches are either too computationally demanding to be applied in complex cases, or too approximate to yield high-quality tests. This paper exploits a recent idea: the state of a generic reconfigurable scan chain is modeled as a finite state automaton and a low-level fault, as an incorrect transition; it then proposes a new algorithm for generating a functional test sequence able to detect all incorrect transitions far more efficiently than previous ones. Such an algorithm is based on a greedy search, and it is able to postpone costly operations and eventually minimize their number. Experimental results on ITC'16 benchmarks demonstrate that the proposed approach is broadly applicable; has limited computational requirements; and the test sequences are order of magnitudes shorter than the ones previously generated by approximate methodologies.

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Section: Introductionmentioning

confidence: 94%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations

A New Technique to Generate Test Sequences for Reconfigurable Scan Networks

Cantoro

Damljanovic

Reorda

et al. 2018

2018 IEEE International Test Conference (ITC)

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A Complete Design-for-Test Scheme for Reconfigurable Scan Networks

2022

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Reconfigurable Scan Networks (RSNs) are widely used for accessing instruments offline during debug, test and validation, as well as for performing system-level-test and online system health monitoring. The correct operation of RSNs is essential, and RSNs have to be thoroughly tested. However, due to their inherently sequential structure and complex control dependencies, large parts of RSNs have limited observability and controllability. As a result, certain faults at the interfaces to the instruments, control primitives and scan segments remain undetected by existing test methods. In the paper at hand, Design-for-test (DfT) schemes are developed to overcome the testability problems e.g. by resynthesizing the initial design. A DfT scheme for RSNs is presented, which allows detecting all single stuck-at-faults in RSNs by using existing test generation techniques. The developed scheme analyzes and ensures the testability of all parts of RSNs, which include scan segments, control primitives, and interfaces to the instruments. Therefore, the developed scheme is referred to as a complete DfT scheme. It allows for a test integration to cover multiple fault locations can with a single efficient test sequence and to reduce overall test cost.

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