On Timing Analysis of Combinational Circuits

Abstract

Abstract. In this paper we report some progress in applying timed automata technology to large-scale problems. We focus on the problem of finding maximal stabilization time for combinational circuits whose inputs change only once and hence they can be modeled using acyclic timed automata. We develop a "divideand-conquer" methodology based on decomposing the circuit into sub-circuits and using timed automata analysis tools to build conservative low-complexity approximations of the sub-circuits to be used as inputs for the rest of the system. Some preliminary results of this methodology are reported.

Timed verification of the generic architecture of a memory circuit using parametric timed automata

“…The model of timed automata [3] is especially well-suited to represent asynchronous circuits (see, e.g., [15,5,17]). Roughly speaking, a timed automaton is a finite state automata enriched with (symbolic) clocks that evolve at the same uniform rate, and can be reset to zero.…”

“…Besides [9,8], our work is along the lines of [15,5,17] where timed automata have been used extensively to model and check timing properties of asynchronous circuits (cf. [11]).…”

Some Progress in Satisfiability Checking for Difference Logic

“…An upper-bound on d can be computed by methods of static timing analysis (summing the delays along the longest path in the circuit), and also each k gives an upper bound on the metric length of runs with k steps. The reader may look at [BBM04] for more details on the problem definition and at [NMA + 02] for the formulation of bounded reachability of timed automata in DL. Readers familiar with SAT based methods for circuit verification should bear in mind that we are dealing here with a much richer model of the circuits, with one clock variable per gate.…”

On timed components and their abstraction

“…When the effect of this event is propagated through the system, its associated clock is deactivated and can be reused by future events. 3 These "dynamic clocks" constitute a novel and non-trivial feature in the theory and practice of timed automata and their number is always bounded, depending on the variability of the input and the structure of the system.…”

“…2 A timed element is something that measures the time since the occurrence of some event and uses this value to guard a transition. 3 We restrict ourselves to systems with an acyclic structure, systems in which every cycle in the transition graph has at least one transition labelled with an input event. Such systems do not generate "autonomous" cycles and hence every input event generates a "wave" of reactions that propagate through the system within a finite time.…”