Optimal design for digital comparator using <scp>QCA</scp> nanotechnology with energy estimation

Sharma, Vibha

doi:10.1002/jnm.2822

Cited by 34 publications

(17 citation statements)

References 33 publications

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“…The proposed XOR consisted of 14 cells, with an area of 0.01 µm 2 and a latency of 0.5 clock cycle. Sharma et al (2020), proposed 1-bit comparator circuit that designed by only 26 cells. Wang et al (2020), proposed a novel XOR/XNOR structure for modular design of QCA circuits.…”

Section: Previous Workmentioning

confidence: 99%

Design and simulation of efficient combinational circuits based on a new XOR structure in QCA technology

et al. 2021

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Quantum-dot cellular automata (QCA), due to its unique characteristics like low power consumption, nanoscale design, and high computing speed is considered as an emerging technology, and it can be used as an alternative for CMOS technology in circuit design for quantum computers in the near future. XOR gate has many applications in the design of digital circuits in QCA. In this paper, an efficient novel structure of XOR gate is proposed in QCA. Also, a novel 1-bit comparator circuit, 1-bit full adder, binary to gray and gray to binary convertor code based on the proposed XOR is designed and simulated using QCADesigner 2.0.3. The simulation results demonstrated that the proposed structures provide improvements compared to previous works in terms of QCA cells count, area, and circuit cost.

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Section: Previous Workmentioning

confidence: 99%

Design and simulation of efficient combinational circuits based on a new XOR structure in QCA technology

et al. 2021

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“…In respect of this, a full adder circuit has been designed and tested in QCA [28]. The optimized design of digital comparator with very low number of cells and low quantum cost and energy dissipation calculation using QCA Designer‐E and QCA Pro is presented in [29].…”

Section: Introductionmentioning

confidence: 99%

RSCV: Reversible Select, cross and variation architecture in quantum‐dot cellular automata

Kundu

Das

2022

IET Quantum Communication

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In the past few years, CMOS semiconductor has been a growing and evolving technology in VLSI. However, due to the scaling issue and some other constraints like heat generation, high power consumption QCA (quantum cellular automata) emerged as an alternate and enhanced solution that provides a new technique of computing than CMOS in recent years. QCA is highly effective in implementing both Irreversible and Reversible logic, which has been shown to be incredibly efficient in terms of power consumption. A novel technique to data encryption called as SCV (select, cross, and variation) is demonstrated in this paper, which is based on ASCII to binary conversion and uses reversible logic. The data security procedure is aided by implementing SCV logic in reversible logic. Using Fredkin gate, it is built in QCA. QCADesigner tool has been used here for design and verification purposes. Total 80 cell counts and 0.14 μm 2 area are required. The theoretical data and the simulation results are the same as the intended circuit. Comparison to previous QCA architectural features is featured. K E Y W O R D Scross and variation (SCV method), data encryption, fredkin Gate, quantum-dot cellular automata (QCA), reversible Gate, selectThis is an open access article under the terms of the Creative Commons Attribution License, which permits use, distribution and reproduction in any medium, provided the original work is properly cited.

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“…As a matter of fact, in binary type, a digital comparator receives two inputs and decides if one number is larger than (Singh and Sharma, 2020), smaller than or equal to the other one (Shiri et al, 2019). Due to this importance, the fault-tolerant architecture for the comparators is very required (Sharma, 2020).…”

Section: Introductionmentioning

confidence: 99%

A fault-tolerant design for a digital comparator based on nano-scale quantum-dotcellular automata

Huang

Ren

Jiang

et al. 2021

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Purpose Quantum-dot Cellular Automata (QCA) is a new nano-scale transistor-less computing model. To address the scaling limitations of complementary-metal-oxide-semiconductor technology, QCA seeks to produce general computation with better results in terms of size, switching speed, energy and fault-tolerant at the nano-scale. Currently, binary information is interpreted in this technology, relying on the distribution of the arrangement of electrons in chemical molecules. Using the coplanar topology in the design of a fault-tolerant digital comparator can improve the comparator’s performance. This paper aims to present the coplanar design of a fault-tolerant digital comparator based on the majority and inverter gate in the QCA. Design/methodology/approach As the digital comparator is one of the essential digital circuits, in the present study, a new fault-tolerant architecture is proposed for a digital comparator based on QCA. The proposed coplanar design is realized using coplanar inverters and majority gates. The QCADesigner 2.0.3 simulator is used to simulate the suggested new fault-tolerant coplanar digital comparator. Findings Four elements, including cell misalignment, cell missing, extra cell and cell dislocation, are evaluated and analyzed in QCADesigner 2.0.3. The outcomes of the study demonstrate that the logical function of the built circuit is accurate. In the presence of a single missed defect, this fault-tolerant digital comparator architecture will achieve 100% fault tolerance. Also, this comparator is above 90% fault-tolerant under single-cell displacement faults and is above 95% fault-tolerant under single-cell missing defects. Originality/value A novel structure for the fault-tolerant digital comparator in the QCA technology was proposed used by coplanar majority and inverter. Also, the performance metrics and obtained results establish that the coplanar design can be used in the QCA circuits to produce optimized and fault-tolerant circuits.

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Optimal design for digital comparator using QCA nanotechnology with energy estimation

Cited by 34 publications

References 33 publications

Design and simulation of efficient combinational circuits based on a new XOR structure in QCA technology

Design and simulation of efficient combinational circuits based on a new XOR structure in QCA technology

RSCV: Reversible Select, cross and variation architecture in quantum‐dot cellular automata

A fault-tolerant design for a digital comparator based on nano-scale quantum-dotcellular automata

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