Optimal placement of decoupling capacitors on PCB using Poynting vectors obtained by FDTD method

Hattori, I.; Kamo, Atsushi; Watanabe, Takayuki; Asai, Hideki

doi:10.1109/iscas.2002.1010632

Cited by 4 publications

References 9 publications

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New definition of slotline characteristic impedance

Xuan

Zhang

et al. 2009

2009 3rd IEEE International Symposium on Microwave, Antenna, Propagation and EMC Technologies for Wireless Communications

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In this paper, different approaches to calculate the characteristic impedance of slotlines by finite difference time domain (FDTD) method is presented. It shows that for non-TEM mode transmission lines, different definitions of Z 0 yield completely different results. Then a more rational definition of characteristic impedance of slotlines is proposed. Result is obtained and compared with other definitions.

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New definition of slotline characteristic impedance

Xuan

Zhang

et al. 2009

2009 3rd IEEE International Symposium on Microwave, Antenna, Propagation and EMC Technologies for Wireless Communications

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The Assessment of the Measurement of the Poynting Vector for Power System Instrumentation

Stahlhut

Browne

Heydt

2007

2007 39th North American Power Symposium

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Decoupling-Capacitor Planning and Sizing for Noise and Leakage Reduction

Wong

Minz

Lim

2007

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Decoupling capacitor (decap) is a popular means to reduce power supply noise in integrated circuits. Since the decaps are usually inserted in the whitespace of the device layer, decap management during the floorplanning stage is desirable. In this paper, we devise the Effective Decap Distance model to analyze how functional blocks are affected by non-neighboring decaps. In addition, we propose a generalized network flow-based algorithm to allocate the whitespace to the blocks and determine the oxide thicknesses for the decaps to be implemented in the whitespace. Experimental results show that our decap allocation and sizing methods can significantly reduce decap budget and leakage power with a small increase in area and wirelength when integrated into 2D and 3D floorplanners.

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Optimal placement of decoupling capacitors on PCB using Poynting vectors obtained by FDTD method

Cited by 4 publications

References 9 publications

New definition of slotline characteristic impedance

New definition of slotline characteristic impedance

The Assessment of the Measurement of the Poynting Vector for Power System Instrumentation

Decoupling-Capacitor Planning and Sizing for Noise and Leakage Reduction

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