Optimization of CMOS analog circuits using sine cosine algorithm

Majeed, M A Mushahhid; Rao, Patri Srihari

doi:10.1109/icccnt.2017.8204048

Cited by 11 publications

(4 citation statements)

References 12 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…For SCA issues, the selection features of classical SCA are used to increase exploration and exploitation efficiency using various attempts. Specifically, SCA has been used as the main algorithm to enhance the circuit design requirements by reducing the area occupied by circuit transistors [26]. SCA relies on an iterative strategy to obtain a random search in the solution space like most SBA.…”

Section: Introductionmentioning

confidence: 99%

A Hybrid Modified Sine Cosine Algorithm Using Inverse Filtering and Clipping Methods for Low Autocorrelation Binary Sequences

Rosli¹,

Rahim²,

Rani³

et al. 2022

CMC

View full text Add to dashboard Cite

The essential purpose of radar is to detect a target of interest and provide information concerning the target's location, motion, size, and other parameters. The knowledge about the pulse trains' properties shows that a class of signals is mainly well suited to digital processing of increasing practical importance. A low autocorrelation binary sequence (LABS) is a complex combinatorial problem. The main problems of LABS are low Merit Factor (MF) and shorter length sequences. Besides, the maximum possible MF equals 12.3248 as infinity length is unable to be achieved. Therefore, this study implemented two techniques to propose a new metaheuristic algorithm based on Hybrid Modified Sine Cosine Algorithm with Cuckoo Search Algorithm (HMSCACSA) using Inverse Filtering (IF) and clipping method to achieve better results. The proposed algorithms, LABS-IF and HMSCACSA-IF, achieved better results with two large MFs equal to 12.12 and 12.6678 for lengths 231 and 237, respectively, where the optimal solutions belong to the skew-symmetric sequences. The MF outperformed up to 24.335% and 2.708% against the state-of-the-art LABS heuristic algorithm, xLastovka, and Golay, respectively. These results indicated that the proposed algorithm's simulation had quality solutions in terms of fast convergence curve with better optimal means, and standard deviation.

show abstract

Section: Introductionmentioning

confidence: 99%

A Hybrid Modified Sine Cosine Algorithm Using Inverse Filtering and Clipping Methods for Low Autocorrelation Binary Sequences

Rosli¹,

Rahim²,

Rani³

et al. 2022

CMC

View full text Add to dashboard Cite

show abstract

“…The proposed technique results in low power making it relatively preferable for low power circuit sizing problem. For a fair comparison between recent techniques using algorithms such as PSO (Prajapati and Shah, 2015), WOA (Sarkar et al , 2018), ALC-PSO (De et al , 2017), GSA (Dehbashian and Maymandi-Nejad, 2017a), Advanced GSA (AGSA) (Dehbashian and Maymandi-Nejad, 2017a) and SCA (Majeed and Rao, 2017), with application to circuit sizing that utilize different technologies, figure of merit ( FOM opamp ) is considered which is given as follows: …”

Section: Resultsmentioning

confidence: 99%

A hybrid of WOA and mGWO algorithms for global optimization and analog circuit design automation

Majeed

Patri

2019

COMPEL

Self Cite

View full text Add to dashboard Cite

Purpose This paper aims to resolve the sizing issues of analog circuit design by using proposed metaheuristic optimization algorithm. Design/methodology/approach The hybridization of whale optimization algorithm and modified gray wolf optimization (WOA-mGWO) algorithm is proposed, and the same is applied for the automated design of analog circuits. Findings The proposed hybrid WOA-mGWO algorithm demonstrates better performance in terms of convergence rates and average fitness of the function after testing it with 23 classical benchmark functions. Moreover, a rigorous performance evaluation is done with 20 independent runs using Wilcoxon rank-sum test. Practical implications For evaluating the performance of the proposed algorithm, a conventional two-stage operational amplifier is considered. The aspect ratios calculated by simulating the algorithm in MATLAB are later used to design the operational amplifier in Cadence environment using 180nm CMOS standard process. Originality/value The hybrid WOA-mGWO algorithm is tailored to improve the exploration ability of the algorithm by combining the abilities of two metaheristic algorithms, i.e. whale optimization algorithm and modified gray wolf optimization algorithm. To build further credence and to prove its profound existence in the latest state of the art, a statistical study is also conducted over 20 independent runs, for the robustness of the proposed algorithm, resulting in best, mean and worst solutions for analog IC sizing problem. A comparison of the best solution with other significant sizing tools proving the efficiency of hybrid WOA-mGWO algorithm is also provided. Montecarlo simulation and corner analysis are also performed to validate the endurance of the design.

show abstract

“…Using this algorithm for circuits of a CMOS differential amplifier and a CMOS operational amplifier with two stages are optimized in terms of transistor size to reduce the area occupied by transistors in the circuit. This algorithm is used to optimize the transistor size of the CMOS differential amplifier circuit and two-stage CMOS operational amplifier circuit to reduce the area occupied by transistors in the circuit and to improve the design specifications [8]. A multi-objective optimization algorithm is called Non-Dominated Sorting Genetic Algorithm (NSGA-II) for optimizing CMOS voltage reference circuit parameters.…”

Section: Introductionmentioning

confidence: 99%

Design of CMOS circuits through transistor sizing techniques

2023

ACE

View full text Add to dashboard Cite

With the increasingly diverse functional requirements of contemporary electronic products, the complexity of CMOS circuits often used in chips becomes higher and the number of transistors used increases. To solve the resulting performance problems of CMOS circuits, researchers have searched for many transistor sizing technologies. This paper summarizes three methods of CMOS circuit optimization. The paper introduces these three methods in terms of principle, effect, and application scenarios, and compares them respectively. Through analysis and simulation, it can be found that the use of these methods in circuit design can effectively achieve the purpose of improving speed, reducing power consumption, and improving the overall performance of the circuit. This lays a solid foundation for finally being able to present a good product with excellent performance and enhance the market competitiveness of the product. CMOS circuits are widely used, and circuit optimization is of great importance to the overall circuit design, and better optimization methods can even promote the development of the entire electronics and chip manufacturing fields.

show abstract

Optimization of CMOS analog circuits using sine cosine algorithm

Cited by 11 publications

References 12 publications

A Hybrid Modified Sine Cosine Algorithm Using Inverse Filtering and Clipping Methods for Low Autocorrelation Binary Sequences

A Hybrid Modified Sine Cosine Algorithm Using Inverse Filtering and Clipping Methods for Low Autocorrelation Binary Sequences

A hybrid of WOA and mGWO algorithms for global optimization and analog circuit design automation

Design of CMOS circuits through transistor sizing techniques

Contact Info

Product

Resources

About