Optimization of Integrated Transistors for Very High Frequency DC–DC Converters

Abstract

Abstract-This document presents a method to optimize integrated LDMOS (Lateral Double-Diffused MOSFET) transistors for use in very high frequency (VHF, 30-300 MHz) dc-dc converters. A transistor model valid at VHF switching frequencies is developed. Device parameters are related to layout geometry and the resulting layout vs. loss tradeoffs are illustrated. A method of finding an optimal layout for a given converter application is developed and experimentally verified in a 50 MHz converter, resulting in a 54% reduction in power loss over a hand-optimized device. It is further demonstrated that hot-carrier limits on device safe operating area may be relaxed under soft switching, yielding significant further loss reduction. A device fabricated with 3 um gate length in 20-V design rules is validated at 35-V, offering reduced parasitic resistance and capacitance as compared to the 5.5 um device. Compared to the original design, loss is up to 75% lower in the example application.

Contour-Mode Ring-Shaped AlN Microresonator on Si and Feasibility of Its Application in Series-Resonant Converter

“…The ), which may not be sufficient to charge/discharge T C . Moreover, the losses associated with switching the FETs also increases with the operating frequency [60]. The switching losses are negligible if the ZVS condition is ensured.…”

“…The switching losses are negligible if the ZVS condition is ensured. However, the gate switching loss is proportional to the switching frequency [60]. In order to facilitate the design of the converter, the resonant frequency of the contour mode device should be as low as possible.…”

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“…Recently, the high-voltage (HV) LDMOS devices are widely used in communication modules, electronic power switch components, power management ICs, automotive electronics, LED illuminations and LCD drivers [1]- [3]. The HV devices have become more and more important.…”