2010
DOI: 10.1088/0268-1242/25/11/115002
|View full text |Cite
|
Sign up to set email alerts
|

Optimization of lateral double-diffused MOS transistors in 0.18 µm bipolar-CMOS-DMOS technology for wide-voltage applications

Abstract: The reduced-surface-field-type lateral double-diffused MOS (LDMOS) structure, which is the key element used in the power device of the bipolar-CMOS-DMOS (BCD) process, was optimized for a wide voltage range of 20-60 V class in the 0.18 μm BCD process. The on-state resistance (R on ) characteristics to the drain-to-source breakdown voltage (BV dss ) have been improved by optimizing the n-drift conditions and related design rules and the reliable safe operating area (SOA) of the device has also been secured for … Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
1

Citation Types

0
1
0

Year Published

2014
2014
2014
2014

Publication Types

Select...
1

Relationship

0
1

Authors

Journals

citations
Cited by 1 publication
(1 citation statement)
references
References 13 publications
0
1
0
Order By: Relevance
“…Lateral double-diffused MOSFET (LDMOS) is generally used as level shift device or switching device in various high-voltage applications [1][2][3][4][5][6]. For the level shift device, which does not need large width-to-length ratio, circular or racetrack layout is usually adopted.…”
Section: Introductionmentioning
confidence: 99%
“…Lateral double-diffused MOSFET (LDMOS) is generally used as level shift device or switching device in various high-voltage applications [1][2][3][4][5][6]. For the level shift device, which does not need large width-to-length ratio, circular or racetrack layout is usually adopted.…”
Section: Introductionmentioning
confidence: 99%