Optimization of power and energy in FinFET based SRAM cell using adiabatic logic

Patil, S.; Bhaaskaran, V. S. Kanchana

doi:10.1109/icnets2.2017.8067966

Cited by 15 publications

(2 citation statements)

References 6 publications

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“…The results reveal that the aforementioned elements have a considerable impact on circuit performance and SNM. Patil and Bhaaskaran (2017) presented a number of structural options to deal with increasing power dissipation. The author employs numerous strategies to address various challenges such as area concerns, stability, power consumption, and increased power dissipation.…”

Section: Literature Reviewmentioning

confidence: 99%

Design and Analysis of SRAM Cell for Smart Application

Praveen¹,

Singh²

2022

Journal of Computer Science

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In today's circuit technology, power consumption and savings are key concerns. The driving reasons behind these innovations are portable devices that require high throughput and low power dissipation, such as computers, phones, and Personal Digital Assistants (PDAs). In portable devices, reducing or decreasing IC dissipated power through design optimization is a big problem, and restricted battery lifespan places very severe restrictions on overall power usage. In this study SRAM circuit for smart applications has been investigated using various factors such as write, read, dynamic, static power with voltage and temperature. The power consumption analysis is the most essential criteria for memory design. Because data stability is a critical concern, affecting both the read and write operations. The implemented 9T SRAM in this study is more efficient than the other SRAM in terms of power usage. When compared with the existing SRAM circuits taken for comparison of different parameters, the proposed 9T SRAM, circuit uses less than 28.2% write power, while it uses about the same for read operation. The data retention voltage for both circuits is 0.29 V, which is utilized to store the data in the circuit. The 32 nm Bulk CMOS process technology from PTM files is used for designing and analysis.

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Section: Literature Reviewmentioning

confidence: 99%

Design and Analysis of SRAM Cell for Smart Application

Praveen¹,

Singh²

2022

Journal of Computer Science

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“…In addition, the authors have applied reduction technique for mitigating current leakage problem. Patil and Bhaaskaran [21] have compared various different adiabatic SRAM cell with DSM and UDSM nodes in terms of their power and energy parameters. The outcomes of presented approach display that energy consumed by FinFET based 8T and 9T SRAM cell is lesser than the existing 6T CMOS based SRAM.…”

Section: Introductionmentioning

confidence: 99%

A novel optimization framework for controlling stabilization issue in design principle of FinFET based SRAM

Girish¹,

R²

2019

IJECE

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The conventional design principle of the finFET offers various constraints that act as an impediment towards improving ther performance of finFET SRAM. After reviewing existing approaches, it has been found that there are not enough work found to be emphasizing on cost-effective optimization by addressing the stability problems in finFET design.Therefore, the proposed system introduces a novel optimization mechanism considering some essential design attributes e.g. area, thickness of fin, and number of components. The contribution of the proposed technique is to determine the better form of thickness of fin and its related aspect that can act as a solution to minimize various other asscoiated problems in finFET SRAM. Implemented using soft-computational approach, the proposed system exhibits that it offers better energy retention, lower delay, and potential capability to offer higher throughput irrespective of presence of uncertain amount of noise within the component.

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Impact of High-Performance Transistor on Performance of Static Random Access Memory for Low-Voltage Applications

Rawat

Mittal

2023

Lecture Notes in Networks and Systems

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Optimization of power and energy in FinFET based SRAM cell using adiabatic logic

Cited by 15 publications

References 6 publications

Design and Analysis of SRAM Cell for Smart Application

Design and Analysis of SRAM Cell for Smart Application

A novel optimization framework for controlling stabilization issue in design principle of FinFET based SRAM

Impact of High-Performance Transistor on Performance of Static Random Access Memory for Low-Voltage Applications

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