Overview and status of the ALICE silicon pixel detector

Riedler, P.; Anelli, G.; Badalà, A.; Boccardi, Andrea; Bruno, G. E.; Burns, Michael J.; Cali, I. A.; Campbell, M.; Caselle, M.; Ceresa, S.; Chochula, P.; Cinausero, M.; Conrad, J.; Dima, R.; Elia, D.; Fabris, D.; Fini, R. A.; Fioretto, E.; Formenti, F.; Kapusta, S.; Kluge, A.; Krivda, M.; Lenti, V.; Librizzi, F.; Lunardon, M.; Manzari, V.; Morel, Michel; Moretto, S.; Nilsson, P.; Osmic, F.; Pappalardo, G. S.; Paticchio, V.; Pepato, A.; Prete, G.; Pulvirenti, A.; Riggi, F.; Šándor, L.; Santoro, R.; Scarlassara, F.; Segato, G.; Soramel, F.; Stefanini, G.; Matos, C. Torcato de; Turrisi, R.; Vannucci, L.; Viesti, G.; Virgili, T.

doi:10.1016/j.nima.2006.04.092

Cited by 11 publications

(4 citation statements)

References 6 publications

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“…While failure modes described in Sect. 4.4.1 and 4.4.2 are expected to occur only in the prototyping stage, when the procedures are not yet well established, the experience of other pixel projects [3,4,5] shows that the failure of readout chips after bump bonding cannot completely be avoided. The damage is often caused by silicon pieces which fall off the chip edges during or after dicing.…”

Section: Tests Of the Readout Chipsmentioning

confidence: 99%

Development of an Indium bump bond process for silicon pixel detectors at PSI

Broennimann

Glaus

Gobrecht

et al. 2006

Nuclear Instruments and Methods in Physics Research Section A:

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The hybrid pixel detectors used in the high energy physics experiments currently under construction use a vertical connection technique, the so-called bump bonding. As the pitch below 100 µm, required in these applications, cannot be fullfilled with standard industrial processes (e.g. the IBM C4 process), an in-house bump bond process using reflowed indium bumps was developed at PSI as part of the R&D for the CMS-pixel detector.The bump deposition on the sensor is performed in two subsequent lift-off steps. As the first photolithographic step a thin under bump metalization (UBM) is sputtered onto bump pads. It is wettable by indium and defines the diameter of the bump. The indium is evaporated via a second photolithographic step with larger openings and is reflowed afterwards. The height of the balls is defined by the volume of the indium. On the readout chip only one photolithographic step is carried out to deposit the UBM and a thin indium layer for better adhesion. After mating both parts a second reflow is performed for self alignment and obtaining high mechanical strength.For the placement of the chips a manual and an automatic machine were constructed. The former is very flexible in handling different chip and module geometries but has a limited throughput while the latter features a much higher grade of automatisation and is therefore much more suited for producing hundreds of modules with a well defined geometry.The reliability of this process was proven by the successful construction of the PILATUS detector. The construction of PILATUS 6M (60 modules) and the CMS pixel barrel (roughly 800 modules) will start in 2005.

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Section: Tests Of the Readout Chipsmentioning

confidence: 99%

Development of an Indium bump bond process for silicon pixel detectors at PSI

Broennimann

Glaus

Gobrecht

et al. 2006

Nuclear Instruments and Methods in Physics Research Section A:

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“…Each half stave consists of a linear array of 10 ALICE pixel chips bump bonded to two silicon sensors and is read out using a multi-chip module (MCM) [2][3][4][5]. The ALICE trigger has three stages (L0, L1, L2) whereas the SPD system uses L1 and L2 triggers only.…”

Section: Introductionmentioning

confidence: 99%

The ALICE silicon pixel detector readout electronics

Krivda

Bán

Burns

et al. 2010

Nuclear Instruments and Methods in Physics Research Section A:

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The ALICE silicon pixel detector (SPD) constitutes the two innermost layers of the ALICE inner tracker system [1]. The SPD contains 10 million pixels segmented in 120 detector modules (half staves), which are connected to the offdetector electronics with bidirectional optical links. Raw data from the on-detector electronics are sent to 20 FPGA-based processor cards (Routers) each carrying three 2-channel linkreceiver daughter-cards. The routers process the data and send them to the ALICE DAQ system via the ALICE detector data link (DDL). The SPD control, configuration and data monitoring is performed via the VME interface of the routers. This paper describes the detector readout and control via the off-detector electronics.

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“…The ALICE Silicon Pixel Detector (SPD) is the innermost detector of the Inner Tracking System of the ALICE apparatus [2]. It is shown in Fig.…”

Section: Introductionmentioning

confidence: 99%

“…The remaining four solutions are multichannel receivers implemented on FPGAs 1. Fully operational hardware implementation, 20 bit word length, 40 MHz clock 2. Behavioral simulation, 10 bit word length, 80 MHz clock 3.…”

mentioning

confidence: 99%

The Level 0 Pixel Trigger system for the ALICE experiment

2007

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The ALICE Silicon Pixel Detector contains 1200 readout chips. Fast-OR signals indicate the presence of at least one hit in the 8192 pixel matrix of each chip. The 1200 bits are transmitted every 100 ns on 120 data readout optical links using the G-Link protocol. The Pixel Trigger System extracts and processes them to deliver an input signal to the Level 0 trigger processor targeting a latency of 800 ns. The system is modular and based on FPGA devices. The architecture allows the user to define and implement various trigger algorithms. The system uses advanced 12-channel parallel optical fiber modules operating at 1310 nm as optical receivers. Multi-channel G-Link receivers were realized in programmable hardware and tested. The design of the system and the progress of the ALICE Pixel Trigger project are described in this paper.

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Overview and status of the ALICE silicon pixel detector

Cited by 11 publications

References 6 publications

Development of an Indium bump bond process for silicon pixel detectors at PSI

Development of an Indium bump bond process for silicon pixel detectors at PSI

The ALICE silicon pixel detector readout electronics

The Level 0 Pixel Trigger system for the ALICE experiment

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