Packaging assessment of porous ultra low-k materials

Rasco, M.; Mosig, K.; Ling, Jamin; Elenius, P.; Augur, R.

doi:10.1109/iitc.2002.1014905

Cited by 10 publications

(3 citation statements)

References 3 publications

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“…In Cu CMP with low-k dielectrics, excess downforce during polishing can cause cracks or delaminations at the interfaces. 1,2) Recently, numerous works have been conducted on package-level chip integrity impact via the assembly and packaging of Cu/low-k systems. The mismatch of thermal expansion coefficients between the low-k films and the polyimide or molding compound causes the back-end layer to delaminate.…”

Section: Introductionmentioning

confidence: 99%

Structural Studies of High-Performance Low-k Dielectric Materials Improved by Electron-Beam Curing

Yoda¹,

Nakasaki

Hashimoto

et al. 2005

Jpn. J. Appl. Phys.

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With the use of a newly developed electron beam (EB) curing process, an advanced methylsilsesquioxane (MSQ) low-k dielectric (LKD) film of k=2.9 was developed. It is noteworthy that the EB curing process can drastically improve the mechanical strength of LKD film and reduces the thermal budget without increasing the k value. The X-ray absorption fine structure (XAFS) study on the LKD was conducted to clarify the structural change upon EB curing. The structure of the film was compared with those of two different types of other MSQ films, the ladder-network structure and the random-network structure, and a chemical vapor deposition (CVD) film. The Si–O–Si bond angle and Si–O (Si–C) bond length were determined by fitting the Fourier transformed extended X-ray absorption fine structure (EXAFS) spectra. Si–O–Si bond angle of LKD film was found to be between those of the ladder and the random structure, which are 135° and 147°, respectively. The X-ray absorption near-edge structure (XANES) spectra of LKD film revealed two broad features corresponding to a mixture of the two structures. In contrast, Si–O–Si angles of the EB-cured LKD film and the CVD film were similar, and the XANES features of both films were almost identical with those of the random structure. The electronic structure as determined from XANES spectra was also discussed by comparing three-dimensional-linkage models obtained by ab initio calculations. We confirmed that the EB curing process of LKD film causes a drastic structural change. The change from the mixture of ladder and random structures to the completely random structure was caused by C–H bond breaking followed by the formation of new polymer-like clusters with C–C bonds.

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Section: Introductionmentioning

confidence: 99%

Structural Studies of High-Performance Low-k Dielectric Materials Improved by Electron-Beam Curing

Yoda¹,

Nakasaki

Hashimoto

et al. 2005

Jpn. J. Appl. Phys.

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“…A multi-level submodeling simulation technique has heen proposed to evaluate the impact of several important packaging parameters on low-k reliability [5]. An attempt to understand the feasibility of packaging of porous ultra low-k materials was reported [6]. Interfacial adhesion for CdSiLK interconnects under flip-chip packaging conditions was measured and compared with the crack driving force derived from 2D FEA model [7].…”

Section: Introductionmentioning

confidence: 99%

Analysis of flip-chip packaging challenges on copper low-k interconnects

Mercado

Goldberg

Koo

et al.

53rd Electronic Components and Technology Conference, 2003. Proceedings.

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As industry trends drive increased integration and speed, Cuilow-k structures are the desired choice for advanced IC circuits. A simulation methodology has been developed to study the flip-chip packaging effect on the Cullow-k structures. Multi-level submodeling techniques have heen used to bridge the scale difference between the flip-chip packages and the metalidielectric stacks. Interface fracture mechanics-based approach is used to determine the crack driving force at each interface. The impact of the die-attach process on interconnect reliability has been evaluated.To achieve smaller feature size and higher speed in future chips, we can replace Si02 with low-k dielectric material in all via and trench layers, or increase the number of metal layers. This paper evaluates the effect of placing low-k as last metal dielectric and low-k at all via and trench layers, as well as the effect of eight-layer metal/dielectric stack compared with the four-layer metal stack.The future flip-chip Cuilow-k packages are facing higher possibilities of adhesive or cohesive failure near the low-k interface. This paper provided a quantitative evaluation of the increased risk, thus providing guidelines to the next level of low-k flipchip packages.

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“…Numerical examinations for the effect of matrial properties of components on reliability of solder bumps and Cu/low-K delamination were carried out by Lai et al [4] and Chen et al [5]. Following experimental investigations, Rasco et al [6] and Chen et al [5] demonstrated that proper selections of component materials can enhance the reliability of packages with Cu/low-K chips.…”

Section: Introductionmentioning

confidence: 99%

Underfill selection for reducing Cu/low-K delamination risk of flip-chip assembly

Wang

Lai

Wang

2006

2006 8th Electronics Packaging Technology Conference

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Experimental and numerical studies were conducted to investigate Cu/low-K delamination potentials of a flip-chip package assembly implemented with different underfills under an accelerated thermal cycling test condition. A total of six underfills were considered and compared. Their temperaturedependent Young's moduli, coefficients of thermal expansion, and glass transition temperatures were measured and incorporated in the finite element model. The numerical predictions were benchmarked by actual thermal cycling test results. Results indicate that the first principal stress at the die edge shows a good correlation with Cu/low-K delamination potentials observed from experiments.

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Packaging assessment of porous ultra low-k materials

Cited by 10 publications

References 3 publications

Structural Studies of High-Performance Low-k Dielectric Materials Improved by Electron-Beam Curing

Structural Studies of High-Performance Low-k Dielectric Materials Improved by Electron-Beam Curing

Analysis of flip-chip packaging challenges on copper low-k interconnects

Underfill selection for reducing Cu/low-K delamination risk of flip-chip assembly

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