[Paper] A 1-inch Optical Format, 80fps, 10.8Mpixel CMOS Image Sensor Operating in a Pixel-to-ADC Pipelined Mode

Takayanagi, Isao; Yoshimura, Norio; Sato, Toshiaki; Matsuo, Shin’ichiro; Tetsuji, Kawaguchi; Mori, K.; Osawa, Shinji; Bales, Timothy; Gattuso, Ernesto S.; Fettig, Douglas; Gravelle, Bob; Pates, Dan; Johnson, Scott D.; Nakamura, Junichi

doi:10.3169/mta.2.95

Cited by 5 publications

(2 citation statements)

References 8 publications

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“…In other words, approximately one-fifth the dynamic range of the pixel saturation level can be output even with TEGD. Image sensors can be frequently operated by changing CG for low noise operation 18) . If this technology is applied to the sensor, it will further reduce both random noise and leak current in the storage node.…”

Section: Measurement Results With Global-shutter Modementioning

confidence: 99%

[Paper] A 3D Stacked 16Mpixel Global-shutter CMOS Image Sensor Using 4 Million Interconnections

Kondô

Takemoto

Kono

et al. 2016

MTA

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This means there are four million micro bumps in the pixel array area for 16 million effective pixels. The signals from readout circuit on the bottom substrate are transferred to the top substrate with micro bumps which are arrayed outside a pixel array area and readout to the outside of the chip through bonding pads in the bottom Abstract We have developed a 3D stacked 16Mpixel global-shutter CMOS image sensor with pixel level interconnections using four million micro bumps. The four photodiodes in the unit pixel circuit on the top substrate share one micro-bump interconnection in a 7.6µm pitch. Each signal of the photodiodes is transferred to the corresponding storage node on the bottom substrate via the interconnection to achieve a global-shutter function. The ratio of the parasitic light sensitivity of an in-pixel storage node and the light sensitivity of a photodiode is -180dB with a 3.8µm pixel. In addition, we discuss further improvement to reduce noise figure in global-shutter image sensors.

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Section: Measurement Results With Global-shutter Modementioning

confidence: 99%

[Paper] A 3D Stacked 16Mpixel Global-shutter CMOS Image Sensor Using 4 Million Interconnections

Kondô

Takemoto

Kono

et al. 2016

MTA

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“…The configuration of analog readout circuitry with correlated-double-sampling (CDS) is widely used to remove pixel-related kTC noise and FPN. [1][2][3][4][5][6][7][8][9][10] In the conventional analog readout circuitry, [11][12][13][14][15][16][17][18][19][20][21][22][23][24][25][26][27][28] a high-gain column amplifier is employed in front of column sampleand-hold (S/H) circuits is utilized to both increase photo signal sensitivity and suppress the random noise of output buffers and quantization noise of the analog-digital converter (ADC). Figure 1 shows the pixel circuit and conventional analog readout circuitry.…”

Section: Introductionmentioning

confidence: 99%

A CMOS image sensor using column-parallel forward noise-canceling circuitry

Li¹,

Wakashima²,

Goda³

et al. 2014

Jpn. J. Appl. Phys.

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In this paper, a new column-parallel analog readout architecture, which is composed of a high-gain amplifier, a forward noise-canceling circuitry (FNC), and sample-and-hold (S/H) capacitors, has been presented for low-noise CMOS image sensors (CIS). A FNC has been proposed to provide a sharp noise-filtering for high-frequency noise arising from the readout signal chain, which effectively reduces random noise of the pixel source follower and column amplifier. In order to keep the high-sensitivity and high-dynamic range output, dual-gain readout chains have been adopted. A prototype 400H × 250V CIS using the readout architecture with the FNC was fabricated in a 0.18 µm 1-poly 3-metal CMOS process with pinned-photodiodes. The experimental results revealed the input-referred noise of the proposed readout architecture was 65 µVrms, which has been reduced by 24% compared to that of the conventional readout architecture.

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