Parallel color space converters for JPEG image compression

Agostini, Luciano; Silva, Ivan Saraiva; Bampi, Sérgio

doi:10.1016/j.microrel.2003.10.016

Cited by 8 publications

(10 citation statements)

References 0 publications

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“…Agostini et al [5] enhanced the first step in compressing a colored image which is the conversion process of a colored image from RGB to YC b C r . This process must operate as fast as possible so that the compression process will not be delayed more.…”

Section: Related Workmentioning

confidence: 99%

“…The conversion process is done using the standard formulas presented in [5,28]. For each operation of these formulas, a suitable hardware is needed to perform the addition or/and multiplication, for example adders, multipliers or/and shifters.…”

Section: Figure 2 Color Conversion Block Diagrammentioning

confidence: 99%

“…The latency of this architecture is five clock cycles and using at most 6 adders and 12 shifters at the same time. Note that the design in [5] used basic equations. In this paper, an approximation technique is applied to accelerate the conversion process.…”

Section: A Fcca Stepmentioning

confidence: 99%

“…The first step in JPEG compression algorithm is color space conversion for compressing colored images from one color space to another to improve the design. The proposed solution, Fast Color Conversion with Approximation (FCCA) method contributes in reducing the latency of the design proposed in [5]. Approximation techniques are used in this paper in order to reduce the latency of color conversion step.…”

Section: Introductionmentioning

confidence: 99%

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FPGA Implementation of Enhanced JPEG Algorithm for Colored Images

Abed¹

2020

IJCDS

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Image quality and size have been growing very fast over the last decades requiring large storage space and high transmission rate. Image compression is an efficient method used to reduce the size of the image. JPEG algorithm has been considered as one of the famous techniques used for image compression. This paper proposed and implemented an optimized hardware solution called Hybrid Compression using Faster Color Conversion and Run Length (HC-FCC-RL) algorithm for JPEG algorithm based on FPGA to reduce the latency and accelerate the compression process. The paper also proposed a Fast Color Conversion with Approximation (FCCA) step to accelerate the conversion process from RGB to YC b C r . Using approximate techniques will reduce the number of resources used as well as the latency with some percentage error. In addition, the paper proposed a Parallel Run Length (P-RL) algorithm to speed up the design. The enhancement approach in this paper aimed to optimize the overall design of the JPEG algorithm targeting color images. To evaluate the performance of the proposed framework, the HC-FCC-RL architecture was implemented in Verilog and synthesized on FPGA board. The color conversion architecture uses 331 logic elements, a latency of 13.930 ns for converting the three colors component of blocks and a power dissipation of 861.03 mW. The percentage errors for the color conversion is 11.6%, 1.8% and 5.3% for Y, C b , C r components, respectively. The Run Length algorithm performs better than existing work by saving 48.36% in logic elements, 53.79% in latency and 62.86% in power dissipation. Thus, the proposed work demonstrated superior performance compared to current work in the literature.

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Section: Related Workmentioning

confidence: 99%

Section: Figure 2 Color Conversion Block Diagrammentioning

confidence: 99%

Section: A Fcca Stepmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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FPGA Implementation of Enhanced JPEG Algorithm for Colored Images

Abed¹

2020

IJCDS

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“…Many papers have addressed this fine-grain parallelization opportunity [5,12]. In addition, parallelization of almost all stages, from color space conversion, over DCT to the Huffman encoding has been addressed [1,7]. Recently, with respect to the JPEG2000 codec, efficient parallelization of wavelet coding has been introduced [8].…”

Section: Related Workmentioning

confidence: 99%

Bi-criteria Pipeline Mappings for Parallel Image Processing

Benoît

Kosch

Rehn‐Sonigo

et al. 2008

Computational Science – ICCS 2008

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Abstract. Mapping workflow applications onto parallel platforms is a challenging problem, even for simple application patterns such as pipeline graphs. Several antagonistic criteria should be optimized, such as throughput/period and latency (or a combination). Typical applications include digital image processing, where images are processed in steadystate mode. In this paper, we study the bi-criteria mapping (minimizing period and latency) of the JPEG encoding on a cluster of workstations. We present an integer linear programming formulation for this NP-hard problem, and we present an in-depth performance evaluation of several polynomial heuristics.

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