Parallel LDPC decoding using CUDA and OpenMP

Abstract

Digital mobile communication technologies, such as next generation mobile communication and mobile TV, are rapidly advancing. Hardware designs to provide baseband processing of new protocol standards are being actively attempted, because of concurrently emerging multiple standards and diverse needs on device functions, hardwareonly implementation may have reached a limit. To overcome this challenge, digital communication system designs are adopting software solutions that use central processing units or graphics processing units (GPUs) to implement communication protocols. In this article we propose a parallel software implementation of low density parity check decoding algorithms, and we use a multi-core processor and a GPU to achieve both flexibility and high performance. Specifically, we use OpenMP for parallelizing software on a multi-core processor and Compute Unified Device Architecture (CUDA) for parallel software running on a GPU. We process information on H-matrices using OpenMP pragmas on a multi-core processor and execute decoding algorithms in parallel using CUDA on a GPU. We evaluated the performance of the proposed implementation with respect to two different code rates for the China Multimedia Mobile Broadcasting (CMMB) standard, and we verified that the proposed implementation satisfies the CMMB bandwidth requirement.

Graphics processing unit-accelerated joint-bitplane belief propagation algorithm in DSC

“…Based on the delivered messages, each node attempts to decode its own value. If the decoded value turns out to contain error, the decoding process is repeated for a predefined number of times [32]. Typically, there are two ways to deliver messages in LDPC decoding.…”

“…The study of LDPC codes was resurrected with the work of Mackay, Neal [27,28] and Luby [1]. Moreover, LDPC codes are superior to Turbo codes which were originally regarded as the best channel coding technique before the LDPC began to draw attention [32]. Therefore, a good candidate for realization of DSC is LDPC code.…”

Parallel LDPC Decoding on a Heterogeneous Platform using OpenCL

“…Iterative decoding based on the delivered messages is processed during the CNP and BNP steps. The decoding process is iterated until the termination condition for the decoded words is satisfied at the PC step [10].…”

“…As the size of an H-matrix increases, the amount of computation grows rapidly. Therefore, designing parallel LDPC decoders using multi-core processors has been actively studied to provide reliable high-speed data transmission [6]- [10]. However, even if most approaches could reduce the decoding time significantly, hardware resource utilization would be insufficient because existing models were parallelized for specific devices with hardware-dependent programming models.…”

Computationally efficient implementation of a Hamming code decoder using graphics processing unit

“…16), Wi-Fi (IEEE802.11), digital high definition TV, wideband code division multiple access (W-CDMA), and global system for mobile communication (GSM) [1]- [7]. However, the fixed functionality of such ASIC devices limits their application to emerging communication standards because they were fixed for specific coding schemes, data rates, frequency ranges, and types of modulation [8]. In addition, manufacturing costs are high and time-to-market of hardware devices is long [9].…”