Parallel optical interconnects: implementation of optoelectronics in multiprocessor architectures

Frietman, Edward E. E.; Nifterick, W. van; Dekker, L.; Jongeling, T. J. M.

doi:10.1364/ao.29.001161

Cited by 19 publications

(6 citation statements)

References 3 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Optical technologies have been enlisted before in the design of parallel computers [1,8,10,21]. However, past efforts were often plagued by large power consumption (often due to redundant broadcasts), inefficient reconfiguration schemes with mechanical components that did not match electronic speeds, unreliability, strict alignment requirements, large complex-ity prohibiting scalability, etc.…”

Section: Networkmentioning

confidence: 99%

“…However, past efforts were often plagued by large power consumption (often due to redundant broadcasts), inefficient reconfiguration schemes with mechanical components that did not match electronic speeds, unreliability, strict alignment requirements, large complex-ity prohibiting scalability, etc. Also, interconnects with wavelength selectivity for channel allocation have been under extensive study recently [1,8,16]. …”

Section: Networkmentioning

confidence: 99%

See 1 more Smart Citation

A new-generation parallel computer and its performance evaluation

Ziavras

Grebel²,

Chronopoulos

et al. 2000

Future Generation Computer Systems

View full text Add to dashboard Cite

An innovative design is proposed for an MIMD distributed shared-memory (DSM) parallel computer capable of achieving gracious performance with technology expected to become feasible/viable in less than a decade. This New Millennium Computing Point Design was chosen by NSF, DARPA, and NASA as having the potential to deliver 100 TeraFLOPS and 1 PetaFLOPS performance by the year 2005 and 2007, respectively. Its scalability guarantees a lifetime extending well into the next century. Our design takes advantage of free-space optical technologies, with simple guided-wave concepts, to produce a 1D building block (BB) that implements efficiently a large, fully connected system of processors. Designing fully connected, large systems of electronic processors could be a very beneficial impact of optics on massively parallel processing. A 2D structure is proposed for the complete system, where the aforementioned 1D BB is extended into two dimensions. This architecture behaves like a 2D generalized hypercube, which is characterized by outstanding performance and extremely high wiring complexity that prohibits its electronics-only implementation. With readily available technology, a mesh of clear plastic/glass bars in our design facilitate point-to-point bit-parallel transmissions that utilize wavelength-division multiplexing (WDM) and follow dedicated optical paths. Each processor is mounted on a card. Each card contains eight processors interconnected locally via an electronic crossbar. Taking advantage of higher-speed optical technologies, all eight processors share the same communications interface to the optical medium using time-division multiplexing (TDM). A case study for 100 TeraFLOPS performance by the year 2005 is investigated in detail; the characteristics of chosen hardware components in the case study conform to SIA (Semiconductor Industry Association) projections. An impressive property of our system is that its bisection bandwidth matches, within an order of magnitude, the performance of its computation engine. Performance results based on the implementation of various important algorithmic kernels show that our design could have a tremendous, positive impact on massively parallel computing. 2D and 3D implementations of our design could achieve gracious (i.e., sustained) PetaFLOPS performance before the end of the next decade.

show abstract

Section: Networkmentioning

confidence: 99%

Section: Networkmentioning

confidence: 99%

A new-generation parallel computer and its performance evaluation

Ziavras

Grebel²,

Chronopoulos

et al. 2000

Future Generation Computer Systems

View full text Add to dashboard Cite

show abstract

“…Let I = {Xi i , X12, . .., (6) Xn,n -_ 1 , be the set of all input matrix elements and 0 = {Yi 1 Y12, . .…”

Section: Translation Rotation and Shift Operationsmentioning

confidence: 99%

High-radix symbolic substitution and superposition techniques for optical matrix algebraic computations

Hwang

Panda

1992

Opt. Eng.

View full text Add to dashboard Cite

“…The use of optics for computing was pioneered among others by Huang 20,19 and Lohmann 28, 2 9 , 33 . So far, research on the use of optical technology in parallel computers has concentrated on the improvement of interconnection networks 36,15,43,3 . Concepts have also been proposed for direct optical connections between electrical 23 or optical 31 memory banks.…”

Section: Optics In Parallel Computingmentioning

confidence: 99%

On the feasibility of a scalable opto-electronic CRCW shared memory

Lukowicz¹,

Tichy²

Proceedings 1st International Conference on Algorithms and Architectures for Parallel Processing

View full text Add to dashboard Cite

In the paper we discuss the results of a feasibility study of an opto-electronic shared memory with concurrent read, concurrent write capability. Unlike previous such work we consider a true hardware shared memory rather then a simulation on a tightly, optically connected distributed memory computer. We describe a n a r chitecture that can be implemented using semiconductor based light modulator and VCSEL laser diode arrays and microlenses. We show how to solve two major problems faced by such a device: optical system complexity and parallel word level write consistency. An analysis of the fundamental performance constraints proves that in general the memory density decreases only linearly with the degree o f c oncurrency as opposed to the quadratic decrease in electronic parallel access memory. Under certain circumstances the memory density can even be shown to be independent of the number of accessing processors. We argue that in principle, a memory with GBytes capacity and a latency of about 1 ns, accessed by thousands of processors is conceivable.

show abstract

Parallel optical interconnects: implementation of optoelectronics in multiprocessor architectures

Cited by 19 publications

References 3 publications

A new-generation parallel computer and its performance evaluation

A new-generation parallel computer and its performance evaluation

High-radix symbolic substitution and superposition techniques for optical matrix algebraic computations

On the feasibility of a scalable opto-electronic CRCW shared memory

Contact Info

Product

Resources

About