Parallel processing of robot-arm control computation on a multimicroprocessor system

Kasahara, Hironori; Narita, Shintaro

doi:10.1109/jra.1985.1087004

Cited by 183 publications

(46 citation statements)

References 10 publications

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“…We have also applied the variable voltage synthesis strategy to a problem of scheduling 24 avionics tasks [1] and scheduling 104 tasks of an elbow manipulator [25]. Since the code for both applications was not available, we did not use the code relocation technique in the optimization process.…”

Section: Resultsmentioning

confidence: 99%

Power optimization of variable voltage core-based systems

Hong¹,

Kirovski

et al. 1998

Proceedings of the 35th Annual Conference on Design Automation Conference - DAC '98

193

142

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Abstract-The growing class of portable systems, such as personal computing and communication devices, has resulted in a new set of system design requirements, mainly characterized by dominant importance of power minimization and design reuse. The energy efficiency of systems-on-a-chip (SOC) could be much improved if one were to vary the supply voltage dynamically at run time. We develop the design methodology for the lowpower core-based real-time SOC based on dynamically variable voltage hardware. The key challenge is to develop effective scheduling techniques that treat voltage as a variable to be determined, in addition to the conventional task scheduling and allocation. Our synthesis technique also addresses the selection of the processor core and the determination of the instruction and data cache size and configuration so as to fully exploit dynamically variable voltage hardware, which results in significantly lower power consumption for a set of target applications than existing techniques. The highlight of the proposed approach is the nonpreemptive scheduling heuristic, which results in solutions very close to optimal ones for many test cases. The effectiveness of the approach is demonstrated on a variety of modern industrialstrength multimedia and communication applications. Index Terms-High-level synthesis, scheduling, synthesis for low power, system-on-a-chip (SOC).

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Section: Resultsmentioning

confidence: 99%

Power optimization of variable voltage core-based systems

Hong¹,

Kirovski

et al. 1998

Proceedings of the 35th Annual Conference on Design Automation Conference - DAC '98

193

142

View full text Add to dashboard Cite

show abstract

“…Most of the priority lists developed in previous research do not include the communication costs [9,11]. To develop the dynamic priority list, let us denote A (n) to be a set of modules that have been assigned to the processors at the nth insertion stage (i.e., the modules that have been inserted into the mapping-schedule from the dynamic priority list), and let A(n) be the complement of A(n).…”

Section: Algorithm With Weighted Bipartite Matchingmentioning

confidence: 99%

“…It is unlikely that further substantial improvements in computational efficiency can be achieved. Nevertheless, some improvements could be achieved by taking advantage of particular computation structures [4], customized algorithms/architectures for specific manipulators [5,6], parallel computations [3,7], and scheduling algorithms for muitiprocessor systems [8][9][10][11]. This paper presents two efficient mapping algorithms for scheduling the robot inverse dynamics computation of an n-jointed manipulator to be executed on a multiprocessor system with processor finishing time and interprocessor communication time considered in the system.…”

Section: Introductionmentioning

confidence: 99%

Efficient mapping algorithms for scheduling robot inverse dynamics computation on a multiprocessor system

Lee

Chen

1990

IEEE Trans. Syst., Man, Cybern.

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This paper presents two efficient mapping algorithms for scheduling the robot inverse dynamics computation consisting of m computational modules with precedence relationship to be executed on a multiprocessor system consisting ofp identical homogeneous processors with processor and communication costs to achieve minimum computation time. An objective function is defined in terms of the sum of the processor finishing time and the interprocessor communication time. The minimax optimization is performed on the objective function to obtain the best mapping. This mapping problem can be formulated as a combination of the graph partitioning and the scheduling problems, both have been known to be NP-complete. Thus, to speed up the searching for a solution, two heuristic algorithms were proposed to obtain fast but suboptimal mapping solutions. The first algorithm utilizes the level and the communication intensity of the task modules to construct an ordered priority list of ready modules and the module assignment is performed by a weighted bipartite matching algorithm. For a near-optimal mapping solution, the problem can be solved by the heuristic algorithm with simulated annealing. These proposed optimization algorithms can solve various large-scale problems within a reasonable time. Computer simulations were performed to evaluate and verify the performance and the validity of the proposed mapping algorithms. Finally, experiments for computing the inverse dynamics of a six-jointed PUMA-like manipulator based on the Newton-Euler dynamic equations were implemented on an NCUBE/ten hypercube computer to verify the proposed mapping algorithms. Computer simulation and experimental results are compared and discussed.

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“…Kashara and Narita (1985) developed a heuristic algorithm and an optimization algorithm for the parallel processing of robot arm control computation on a multiprocessor system [39]. Chen et al (1988) developed a state-space search algorithm coupled with a heuristic for robot inverse dynamics computation on a multiprocessor system [40].…”

Section: Introductionmentioning

confidence: 99%

Parallel Robot Scheduling to Minimize Mean Tardiness with Unequal Release Date and Precedence Constraints Using a Hybrid Intelligent System

Çakar

Köker

Sari

2012

International Journal of Advanced Robotic Systems

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This paper considers the problem of scheduling a given number of jobs on a specified number of identical parallel robots with unequal release dates and precedence constraints in order to minimize mean tardiness. This problem is strongly NP-hard. The author proposes a hybrid intelligent solution system, which uses Genetic Algorithms and Simulated Annealing (GA+SA). A genetic algorithm, as is well known, is an efficient tool for the solution of combinatorial optimization problems. Solutions for problems of different scales are found using genetic algorithms, simulated annealing and a Hybrid Intelligent Solution System (HISS). Computational results of empirical experiments show that the Hybrid Intelligent Solution System (HISS) is successful with regards to solution quality and computational time.

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Parallel processing of robot-arm control computation on a multimicroprocessor system

Cited by 183 publications

References 10 publications

Power optimization of variable voltage core-based systems

Power optimization of variable voltage core-based systems

Efficient mapping algorithms for scheduling robot inverse dynamics computation on a multiprocessor system

Parallel Robot Scheduling to Minimize Mean Tardiness with Unequal Release Date and Precedence Constraints Using a Hybrid Intelligent System

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