Parameter Variation Tolerance and Error Resiliency: New Design Paradigm for the Nanoscale Era

Ghosh, Swaroop; Roy, Kaushik

doi:10.1109/jproc.2010.2057230

Cited by 161 publications

(99 citation statements)

References 131 publications

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“…In Figure 2, when the carry [4] (carry bit from AL + BL) is '1' and SU MM [3 : 0] is 1111 (2) , the output result has an error in SU M [11 : 8]. In the general implementation, the output result will be correct when there are no errors in all (N/k − 1) sub-adders.…”

Section: Accuracy-configurable Addermentioning

confidence: 99%

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Accuracy-configurable adder for approximate arithmetic designs

Kahng

Kang

2012

Proceedings of the 49th Annual Design Automation Conference

381

187

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Approximation can increase performance or reduce power consumption with a simplified or inaccurate circuit in application contexts where strict requirements are relaxed. For applications related to human senses, approximate arithmetic can be used to generate sufficient results rather than absolutely accurate results. Approximate design exploits a tradeoff of accuracy in computation versus performance and power. However, required accuracy varies according to applications, and 100% accurate results are still required in some situations. In this paper, we propose an accuracy-configurable approximate (ACA) adder for which the accuracy of results is configurable during runtime. Because of its configurability, the ACA adder can adaptively operate in both approximate (inaccurate) mode and accurate mode. The proposed adder can achieve significant throughput improvement and total power reduction over conventional adder designs. It can be used in accuracy-configurable applications, and improves the achievable tradeoff between performance/power and quality. The ACA adder achieves approximately 30% power reduction versus the conventional pipelined adder at the relaxed accuracy requirement.

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Section: Accuracy-configurable Addermentioning

confidence: 99%

“…To overcome consequences of overdesign, several recent mechanisms for variation-resilient design [4] allow timing errors and manage design reliability dynamically. Relaxing the requirement of correctness for designs may dramatically reduce costs of manufacturing, verification and test [16].…”

Section: Introductionmentioning

confidence: 99%

Accuracy-configurable adder for approximate arithmetic designs

Kahng

Kang

2012

Proceedings of the 49th Annual Design Automation Conference

381

187

View full text Add to dashboard Cite

show abstract

“…[7], only a few works consider its consequences in terms of security. To the best of the authors' knowledge, the simulated experiments in [13] are the only available reference.…”

Section: A Classical Tool In Dpa Is To Use Pearson's Correlation Coefmentioning

confidence: 99%

A Formal Study of Power Variability Issues and Side-Channel Attacks for Nanoscale Devices

Renauld

Standaert

Veyrat-Charvillon

et al. 2011

Lecture Notes in Computer Science

123

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Abstract. Variability is a central issue in deep submicron technologies, in which it becomes increasingly difficult to produce two chips with the same behavior. While the impact of variability is well understood from the microelectronic point of view, very few works investigated its significance for cryptographic implementations. This is an important concern as 65-nanometer and smaller technologies are soon going to equip an increasing number of security-enabled devices. Based on measurements performed on 20 prototype chips of an AES S-box, this paper provides the first comprehensive treatment of variability issues for side-channel attacks. We show that technology scaling implies important changes in terms of physical security. First, common leakage models (e.g. based on the Hamming weight of the manipulated data) are no longer valid as the size of transistors shrinks, even for standard CMOS circuits. This impacts both the evaluation of hardware countermeasures and formal works assuming that independent computations lead to independent leakage. Second, we discuss the consequences of variability for profiled side-channel attacks. We study the extend to which a leakage model that is carefully profiled for one device can lead to successful attacks against another device. We also define the perceived information to quantify this context, which generalizes the notion of mutual information with possibly degraded leakage models. Our results exhibit that existing side-channel attacks are not perfectly suited to this new context. They constitute an important step in better understanding the challenges raised by future technologies for the theory and practice of leakage resilient cryptography.

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“…Fourth, temporal variations of the device performance particularly result from aging effects that are, to some extent, also influenced by process variations. A detailed discussion of variability not only extending from device to design but also stressing the importance of process variations has been recently published by Purdue University and Intel [26].…”

Section: Device Simulationmentioning

confidence: 99%

Hierarchical Simulation of Process Variations and Their Impact on Circuits and Systems: Methodology

Lorenz

Bär

Clees

et al. 2011

IEEE Trans. Electron Devices

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Abstract-Process variations increasingly challenge the manufacturability of advanced devices and the yield of integrated circuits. Technology computer-aided design (TCAD) has the potential to make key contributions to minimize this problem, by assessing the impact of certain variations on the device, circuit, and system. In this way, TCAD can provide the information necessary to decide on investments in the processing level or the adoption of a more variation tolerant process flow, device architecture, or design on circuit or chip level. In this first of two consecutive papers, sources of process variations and the state of the art of related simulation tools are reviewed. An approach for hierarchical simulation of process variations including their correlations is presented. The second paper, also published in this issue, presents examples of simulation results obtained with this methodology.

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Parameter Variation Tolerance and Error Resiliency: New Design Paradigm for the Nanoscale Era

Cited by 161 publications

References 131 publications

Accuracy-configurable adder for approximate arithmetic designs

Accuracy-configurable adder for approximate arithmetic designs

A Formal Study of Power Variability Issues and Side-Channel Attacks for Nanoscale Devices

Hierarchical Simulation of Process Variations and Their Impact on Circuits and Systems: Methodology

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